I wouldn't bet on that.
I've fixed 3 'runaways' including one in marine radar. I could tell you a story or two about that. I turned a turkey into a significant commercial success. There was a restructuring going on at the time. The Technical Director was being promoted to Managing Director, his Technical Manager was becoming Technical Director and quite a few of the R&D staff suggested I should apply for the open Technical Manager post (staff of about 40).
I was VERY flattered.
Graham
-- So prove it. If, in fact, discrete analog design is one of your strong points, you\'d know that if you\'re introducing some nuance into a previously proven design and, therefore, don\'t know about the nitty-gritty of the combo and/or you don\'t know how to simulate it properly, Then you need to build a few a of them, test them over the expected changes in supply voltage, ambient temperature, and load impedance, and report your findings. JF
Well you beat me there by a factor of 3 or so.
Graham
concepts like using
client's copyright.
clot handed them over
-- The buck stops where? JF
concepts like > using
client's > copyright.
could see loads of
-- If frogs had wings... JF
being
Don't let that go to your head, over here, that's one method of getting rid of some one.
Yes, darling !
Graham xxxxx
concepts like >> >
client's >> >
could see >loads of
GGF. The MD and I were discussing dismisalls today. Trouble is, I just took on another contract on Monday. His timing is poor. Poor chap, he's always had the wool pulled over his eyes by idiots who never deserved the positions they had.
Graham
Ok so I can start from Fig 1A
Olivier
Then you
I disagree with this. If one can obtain a decent BSim3 model of the lateral fets, then an empirical test is pretty much irrelevant. The design of SOC analogue ics, with 10'000s analogue devices, entirely in simulation, that work, is routine. In fact, bench work is not even feasible. Indeed, using worst case corner tools (
Kevin Aylward
Other question Graham ... Suppose I work in class A with a current of 1A in the two output transistors. If the current of one transistor goes to 1.5 A the other one should go to 0.5 A and 1A goes through the load. If I forget to connect the load (and I am sure I will), what is going to happen ? Thanks
Olivier
-- Open wide... JF
concepts like >> >
the client's >> >
could see >loads of
another contract on
eyes by idiots who
-- So you think that it would be OK for you to pull the wool over his eyes because you\'re more deserving of the position? JF
-- I\'d agree had you not snipped a little early. Here\'s the whole thing: " If, in fact, discrete analog design is one of your strong points, you\'d know that if you\'re introducing some nuance into a previously proven design and, therefore, don\'t know about the nitty-gritty of the combo and/or you don\'t know how to simulate it properly, Then you need to build a few a of them, test them over the expected changes in supply voltage, ambient temperature, and load impedance, and report your findings." JF
Ok, I'll buy that. I didn't really notice the full "or you don't know how to simulate" bit. The sentence was just a tad too long for me to take it all in.
Kevin Aylward
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