Or the WHAT gate, like, I can't BELIEVE you'd give me that input.
Or the ALREADY and OY gates. e.g. Y = (B XOR C) ALREADY.
And of course back home in Lancashire there's the HAPPEN gate: Y = A + B HAPPEN.
Or the WHAT gate, like, I can't BELIEVE you'd give me that input.
Or the ALREADY and OY gates. e.g. Y = (B XOR C) ALREADY.
And of course back home in Lancashire there's the HAPPEN gate: Y = A + B HAPPEN.
..and of course the inevitable DON'T gate.
-- Keith
;-p
Cheers! Rich
Love it! (chuckle)
That is the exclusive domain of the wife!
Using your favorite CPLD, you can probably OR together many dozens or even hundreds of signals in no more than 10ns or so (say 20-30ns for "hundreds")...
Another alternative, in a synchronous system, is of course to just register the outputs of some blindingly fast logic gate... so you can OR together, say, hundreds of inputs coming in at, say, 200MHz so long as you can wait perhaps
3-4 clock cycles for the output to be valid...
UK, perhaps the WON'T gate is a better term for the digital version of the "inoperational amplifier".
-- Keith
Wire-OR open collector drivers.
-- Keith > >
This brings up something I was wondering about also. What if your design requires about 20 - 30 signals to be OR'ed together? The most I could find was an 8 input OR gate, so I suppose you could use several of these, but it would increase propagation delay considerably. I just ended up using tons of diodes and ORing the signals that way, but is there a more efficient way to do it?
a 1
ground
100outputs
MUX's,
athreshold
find
it
tons of
to
I just found a circuit like what I think you are describing, but although it is called wired OR, it is actually a wired AND circuit, since the output is high only when all the inputs are high. My design required that the output be high when any of the inputs were high. Is there a way to do this (without using dozens of diodes)? I also needed the diodes for DC blocking, since a high on any one of the data lines would also send a high to the ouputs of the other data lines.
find
it
tons of
to
"hundreds")...
register
say,
perhaps
Sorry Joel - what is CPLD? The circuit that I used this in was a switching system for guitar fx. There are 14 switches, each of which activates one or more of 4 possible fx. So if was one effect was present on, say, 7 different switches, I had to OR (using diodes) 7 outputs to 1 input of a latch.
I think in total I had like 87 diodes in there when all was said and done.
Once upon a time, when DTL was king, there were extenders - so one could have as many inputs as you needed with no delay penalty. Maybe you could find a diode or transistor array (E-B and C-B gives you two diodes connected together) that would cut down the space needed.
Is that as bad as the CAN'T gate?
a 1
ground
100outputs
MUX's,
athreshold
find
it
tons of
to
Hmm, how does one do that? Are you referring to a device like ULN2003?
No; you did it right - you do need the diodes (or equivalent gates driving others in a propagation-delay network for all of those inputs).
Everything digital I do, I do in discrete RTL, so it's no hair off my ass. ;-)
I also determined that, to build a 3.5 digit frequency counter from scratch, I would need about 1000 transistors, 2000 diodes (mostly for the display driver -- wired diode array "memory") and 8000 or more resistors (but that's hardly suprising).
Hmm, I may have to build an analog frequency counter instead. Much simpler...
Tim
-- Deep Fryer: A very philosophical monk. Website @
Sorta like; "Constants aren't and variables won't."
-- Keith
Right. Using DeMorgans theorem:
A AND B = NOT( NOT(A) OR NOT(B) )
-- Keith > >
Actually, what you said is ratheer close to the truth...
output is
about
using a
waste
enable
chip...probably
design
could
but
way
although it
is
output
(without
aof
Seems odd that they call this stuff logic dont it?
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