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Two-transistor circuits--can we get to 100?

So it seems like this should have its own thread. From the JL thread, I've collected the following. I've edited it a bit, and tried to avoid NPN/PNP duplication.

Different feedback arrangements seem a reasonable thing to allow, by analogy with "op amp circuits", where feedback is about the only thing you get to play with.

NPN only or PNP only:

CE cascade Darlington CE + follower CB + follower Cascaded follower CB cascade (e.g. double-section cap multiplier) Follower + CE Follower + CB (unbalanced diff pair) True diff pair Current mirror Cascode Bootstrapped cascode Follower + tail current source CE + tail current source (e.g. for AC-only amplification) Bootstrapped CB (e.g. in TIAs)

White follower Two-terminal current limiter Totem pole (needs differential drive, so may be cheating) CE with current source load CB with current source load Series pass with n x Vbe voltage reference Series pass with zenered BE junction reference Back-to-back BE junction zener voltage clipper Parallelled diode-connected transistors for low voltage clipper Zenered BE + CE (overvoltage indicator) Temperature compensated zener (zenered BE with diode-connected in series for TC) RTL NOR gate RTL NAND gate Monostable Bistable Astable Schmitt Miller ramp generator

Phase splitter plus follower CE with diode to cancel out input offset CB, likewise

Temperature compensating current source (mirror with an emitter resistor in one side)

NPN+PNP:

NPN CE + PNP CE NPN CE + PNP follower NPN follower + PNP follower NPN follower + PNP CE NPN follower + PNP CB

Sziklai PNP wraparound (shunt feedback to NPN emitter) Pseudo-SCR

Complementary follower output stage (B-B & E-E) R-R complementary amp (B-B & C-C) Folded cascode Various level shifters: PNP CB - NPN CE (e.g. in HV RRO output stages) PNP CB - NPN CC (e.g. in HV non-RRO output stages)

Single-input totem pole inverter (needs a diode).

So that's 51 right there, without doubling up by reversing polarity.

Plus lots of oscillators and mixers and stuff--once you get into LCs and transformers it's not clear where we should draw the line.

Let's see if we can get to 100.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs
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Lambda diode NpN + Pnp = PUT

Steve

Reply to
sroberts6328

Oh boy, I'd have to look up at least 1/2 of those. OK as my meek offering I just made up the silliest two transistor circuit. (do they have to be something useful?) (low voltage) bridge rectifier, pnp on top, npn on bottom... AC applied to C and E's, DC taken from the bases. it uses the silly model of a transistor as two diodes.

George H.

Reply to
George Herold

XOR gate:

Reply to
bitrex

The "Forrest Mims" two-transistor oscillator, which is different than the usual two-capacitor coupled astable:

Reply to
bitrex

Same as the pseudo-SCR, except using the other base connection. However, that does make it a distinct circuit, I get it.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Fun. I can probably host if somebody will do the HTML. I'm completely flattened at the moment, except for the odd bit of goofing off on Usenet for head maintenance.

I think we're talking about bipolars, given that the original article was written by Barrie Gilbert in the '90s. Diodes are okay if you use one of the transistors as the diode. Maybe if we get on a roll we could have a section for circuits that only work with FETs, e.g. the unbuffered CMOS inverter or the symmetrical depletion MOS current limiter or the lambda diode.

I'd also say that logic circuits aren't distinct from the same topology driven more gently--e.g. the RTL inverter isn't different from a normal CE stage. NOR and NAND gates aren't like any common linear circuit.

Hey, this could wind up being a genuine contribution to engineering education!

Wonder if we could get Barrie to write the foreword. ;)

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Nice. I hadn't seen that one.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Fun. That's an AC-coupled version of the pseudo-SCR. See all the good stuff coming out of the woodwork?

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

On 08/30/2017 02:48 PM, Phil Hobbs wrote: Updated list:

Pseudo-PUT (same circuit as the pseudo-SCR except that the input goes to the other base, as pointed out by Steve Roberts and somebody else that I can't locate ATM)

Bitrex's "Forest Mims two-transistor oscillator" and RTL xor gate This seems to be an AC-coupled version of the pseudo-SCR, but that counts.

Sam Goldwasser's Royer converter, courtesy of the two Dons K (Kuenz and Klipstein)

formatting link
Some of RFish stuff from Don Kuenz:>

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

It's in there as "CE with current source load".

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Richard Torrens' pseduo PUT...

formatting link

Steve

Reply to
sroberts6328

How about an online photo album of sketches of each, with title block and notes? People could contribute. I could do a few as proposed format.

100 should be feasible. I assume that resistors and caps and maybe inductors are free. Don't know about diodes or LEDs or fets; probably not. 
--

John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

Pictures would be great! I would vote to include all diodes.

George H.

Reply to
George Herold

This has probably already been listed but how about a CE amplifier with a current source as the collector load resistor?

--
Regards, 
Carl Ijames
Reply to
Carl Ijames

Inverted transistors count, good one.

The logic comment was basically that e.g. an RTL buffer isn't different from CE+CE--it's just driven harder.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Already in there: CE + CE.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Hmm, I've used parallel collectors and emitters for a multiple-input diff amp. Same principle as ECL gates, which, well, they're still linear!

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If you don't have Q6B (because you're considering just the Q5 pair), the "tail" might be a resistor, in which case the circuit has the characteristic: Ic(tot) ~= max(Vb1, Vb2) / Rtail.

Reminds me, I also did a clamp (so, same idea), but with three transistors (one diode strapped), but the use of inverted transistors may be of interest:

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(Q12-C is the clamp reference, Q13-C is the input signal, current limited.)

Tim

--
Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Contract Design 
Website: http://seventransistorlabs.com
Reply to
Tim Williams

Just use one of those freebie online photo album things.

--

John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
John Larkin

I rememeber a TTL data book (National?) with the schematic of the parity generator/checker. It was filled with those. It had different resistor values for each stage - a level of detail that makes me think it must have been the real schematic.

Reply to
Tom Del Rosso

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