Help with HV common emitter and push pull stage amplifier

I posted a circuit for a +-200 volt amp, made of one cheap opamp and two high-voltage optocouplers. It's around here somewhere...

John

Yes, I've seen a couple of messages refering to it on ABSE. I must apologise but I am new to the group and am not familiar with ABSE. Can you explain?

alt.binaries.schematics.electronic, if I have my spelling right.

--
-------------------------------------------
Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

thanks for the suggestions,

What about the DC offset that I get from changing the collector resistor value? Does that occur because of a change in bias point? I notice that I can increase gain but lose my center at the output.

Nik

1) You have too much attenuation of the DC signal from the output of the opamp to the base of the inverter. Use a zener insead of a large value resistor; the bypass is OK. 2) The gain of the inverter (about 130/12) seems to be less than the feedback gain (1/14); that may cause a problem. 3) Check the over phase shift VS ferquency for possible compensation corrections.

Here's your faulty circuit:

. +-------+--- +200 . | | . 123k | . R2 | | . ,-- 140k --, +--- pushpull out . in | | ,---||---, | emitter -----+--- . -- 10k --+--|- \\ | | | C follower | . | >---+-+- 480k -++-- B | | . ,- 10k --+--|+ / | E | | . | | A1 9k | | | . gnd | | 12k | | . | | | | | . | +-----+-------+--- -200 | . '-- 140k ---------------------------------------'

The first thing that's wrong with your circuit is the opamp error amplifier A1, which should have infinite gain at DC to remove all the offset voltages from the HV output stage. That means that R2 should be replaced by an integrating capacitor, plus a resistor in series, adding a zero in the feedback to help stabilize the loop.

The second thing that's wrong is you've failed to add a respectable level-shifting circuit to run the CE transistor Q1 at -200V. E.g., using a PNP common-base stage, Q2, like this:

. +-------+--- +200 . | | . 390k | . C2 | | . ,-||- R2 -, pnp level +--- pushpull out . in R1 | | shifter | emitter -----+--- . -- 91k --+--|- \\ | Q2 C follower | . | >--+- 68k --E C--+-- B Q1 | | . ,- 100k -+--|+ / B | E | | . | | A1 | 3.3k | | | . gnd | -15 | | | | . | +-----+-------+--- -200 | . '-- 1.40M -----------------------------------------'

It's not clear that degenerating the Q1 stage gain is a good idea.

This circuit still lacks a decent output stabilization scheme, and a class-AB output stage with defined-bias, plus foldback current limiting, but it's a start.

--
 Thanks,
    - Win

The re-arrangement of A1 as a non-inverting amplifier is good.

The 68k between Q1 and Q2 isn't doing much; if you want to limit the Q2 drive current to 3mA, you can raise its emitter resistor to 3.3k, etc. The output stage would still have a very high gain.

I prefer to compensate the circuit with a capacitor from the output to the Q1 input node, which (along with a series resistor for a transfer-function zero) nicely controls the output-stage gain, independent of other variables, and uses the local feedback to lower its high-frequency Zout. The low-frequency part of the stage gain is Xc/3.3k. A1's compensation network then becomes easy, with an R2 zero to cancel A1's C2 pole just before the GBW intersection. Then throwing away loop gain, as with the 100k and 47n, isn't necessary.

--
 Thanks,
    - Win

I like to add resistors to all-silicon-rail-to-rail paths wherever practical. It keeps the shrapnel density down.

John

I was favoring something more like this:

View in a fixed-width font such as Courier.

. . . 200V . | . +----+ . | | . | | . 510k 2.2M . | | . | | . | | . | | . +----|--PUSH -+---->

. in R1 Q1 | | PULL | . -- 1.5M-----|+ \\ Q2 | | | . | >--+-1k-E C--68k-+-- E C | | . +---||---+--|- / | B | B | | . | 47n | A1 | | 560 | | | . 100k | | gnd | +------+ | . | | | | | | . | | C2 | | | | . | +-||- R2--+ +--|

It'll also reduce the Vce a bit, which is good. The A92 and A42 are favorites of mine. They generally work well beyond their 300V max rating, but the 400V rail-to-rail voltage presented is pushing one's luck. If the O.P. only wants 150V out (G=15), then perhaps he can regulate the supplies to +/-160V, which for a +/-150V range only pushes the npn part to Vce = 310V at the upper output voltage limit. This, or any further pushing, will dictate a more complicated cascode circuit, such as we show in figure 6.52.

--
 Thanks,
    - Win

The OP is using NTE equivalents of MPSA92 and MPSA42 in TO-92, so the

68k is there to limit Q2 power dissipation.

All good points.

Thank you gentlemen. Your guidance is very much appreciated.

I too was concerned about the Vce of these transistors. I can regulate the rails down but was wondering if anyone knew of popular BJTs that can handle the rails. I do have some power MOSFETS (IXKC40N60C) from IXYS that Have a Vdss of 600V. I was saving them for another project but if they could be used in this design I would gladly put them here. Any thoughts?

Dr. Hill,

Not sure what you mean by decent output stabilization scheme. I was under the impression that the feedback loop to the opamp would take care of any non-linearities in the output.

Thanks so much,

Nik

Poles and zeros inside the feedback loop, Nik. Ahem! You never heard of a feedback loop oscillating?

--
 Thanks,
    - Win

Ah, just making sure thats what you were mentioning and there wasn't some clever trick of the trade that I was missing. Of course, I'll be swapping capacitors all day. :-) Thanks again.

Nik

Clever tricks of the trade, yes, you betcha! We don't swap our capacitors, we analyze and fit-to-order right the first time.

--
 Thanks,
    - Win

You don't really have a lot of frequency space when the composite amplifier BW is 100-10KHz. It seems that a pole zero pair on your main CE stage has to roll off at -20dB/decade at 10KHz at the latest to hit

0dB by 1MHz, and that implies a maximum gain with local feedback around the discrete amp of 40dB. One way to achieve that is an R+C pole-zero feedback from the output to the CB transconductance level-shift amp for 40dB gain out to 10KHz, and then use a dominant pole on the main CE to achieve 40dB at 10KHz. Then A1's R+C feedback to the IN(-) node is selected to cutin at 10KHz and with an approximate 20x additive superposition advantage to dominate the feedback phase from 100KHz onwards. It has to be something like this if you want to keep the performance flat over 100-10KHz. The THD comes in at 0.01% at 1KHz, so that's a plus. View in a fixed-width font such as Courier.

. . . . 200V . | . .------+------. . | | | . | | | . 10k 3.3k | . | | | . E E | . B-+-B | . Q2 C | C | . .---+-E C--------. | | | | . | | B | +--' | . OP37A | | | | | +-----PUSH --+->

. in R1 22k | +---. | 4.7M | PULL | . -- 150k-----|+ \\ | | | | | | | | . | >--+ - 22k | | +--||--+ | | . .--|- / | ^ | | | | 22p | | | . | A1 100k | | | | | C | | . | | +---+ | | +---- B Q1 | | . | | | | | | E | | . | 47p | gnd | | | | | | . +---||----' | | C | | | . | === +-- B Q3 v | | . | |680p | E - | | . | | 3.3k | | | | . | | | | | | | . | 2.2M +----+------+------' | . | | | | . | | -200V | .gnd--150k--+---2.2M--------------+-------------------------------+ .

And since google groups doesn't carry binaries, either someone will have to be kind enough to slap it up on a website somewhere and post a link, or nikNjegovan will have to get a real newsserver. )-;

Thanks, Rich

Its already done.

RL