Synchronizing T-flops?

You need some d-flops.

John

At 2.2GHz the process was failing some corners when I tried starting with D's

...Jim Thompson

You could do the dual t-flops to get to 1.1G, like you propose, then use a d-flop running at 1.1 to determine if the t's are in the desired phase sequence or not. Use that info to flip the phase of the 137.5 to select the proper mixer output freq.

Or something.

How much image rejection do you need? Keeping close to 90 degrees at

John

Aha! I think that will work. I'm thinking that, since I'm producing SSB, I only need to _know_ the 1.1GHz and 137.5MHz phase, and flip ONLY the 137.5MHz accordingly, to get a known sum or difference (high or low sideband).

In case anyone is pondering... I, the Great God of Analog, made a blooper...

Designed a chip, everything works perfectly, except... on power-up, it's random as to which side band it's on :-(

However, since there's already a switch in the logic to pick low or high sideband, I'll just add Chris' D-flop and then some logic to the switch path.

Thanks!

...Jim Thompson

I thought it was my flipflop.

John

You were too vague for El Denso to understand... us analog guys need pictures ;-)

...Jim Thompson

-- | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | |

Test it using some test tone, see what the phase is, and act accordingly? This might need firmware support.

Or: use a delay (RC?) and a transmission gate to figure out the phase.

Thomas

AND, AND Not

=2E. flip the phase with an inverter ? That stuff is not that fast. If the inverter is just introducing 100ps delay, that amounts to a phase error of some degrees.

Rene

--=20 Ing.Buero R.Tschaggelar -

"Jim Thompson" a écrit dans le message de news: snipped-for-privacy@4ax.com...

Why don't you divide down to 550MHz with your T flops (only one chain), then divide by 4 with a ring counter.

Only 2 T flops, and 2 D flops that run at low frequency.

You know which output is which phase and this is probably even lower power than 2 dividers chains.

Well, I just sort of figured that there aren't a whole lot of different ways to connect two signals to the inputs of a d-type flipflop.

John

John Larkin wrote in news: snipped-for-privacy@4ax.com:

In addition to the two Ts, you need one D f/f (at 1.1 GHz) to determine the phase to control the PECL inverter that you (Jim) originally proposed. 137.5 MHz similarly.

By way of more explanation, take the reference (0 deg) 1.1 GHz signal to the D-clock input, and the + or - 90 signal to the D-input. If the 90 leads then the D output will be 1 and if it lags it will be 0.

HTH

Mr. Beck, Don't let John Fields upset you. He is required to keep spouting absurd inanities in order to maintain his status as resident village idiot ;-)

...Jim Thompson

Dang, John, you and Chris are _quick!_

I was gonna answer this one! :-)

Cheers! Rich

Well, free engineering consulting is a very competitive business.

John

JF designs only with 555 timers, so he never needs to ask questions.

John

Actually, relays are great. Their Ron:Roff ratio, isolation, breakdown voltage, signal bandwidth, and cost per watt switched can't be beat. Too bad they're slow and not very reliable.

Reeds are a special disappointment. They're ideal for lots of things like analog multiplexing of nasty signals, but they never come anywhere close to their claimed lifetimes.

John