In article , Leon wrote: [....]
So it has "N registers" where N is a small integer.
It is not "transversive" like the "transputer".
Each instruction does not encode the address of the next instruction to be done.
The program counter counts up[1] by a single instruction except in the branch cases.
The CPU is not heavily pipelined.
[1] Back when segmentation in the 8086 was introduced as "a way to improve code modularity", I pointed out that a program counter that counted down, (instead of up) would improve "top down design"