Not to mention, it's the one-bit multiplier suitable for double-balanced mixing...
It can be done by implementing a four-to-one MUX, and strapping the MUX inputs with 0 1 1 0, of course. You can also implement an inverter with a flip/flop, which gives truly simultaneous true and inverse outputs.
How about simply feeding A and A-bar into a 2 bit latch? Art
I do remember it. I saw it inside a TTL EXOR circuit, maybe the 7486. Two NPN's, E and B cross connected to open collector drivers (A and B), output taken from connected collectors, with a pull-up. At least it is symmetrical, but maybe not too fast.
A ---- E1 -- B2 pull-up | C1 -- C2 --+--- OUT
B ---- B1 -- E2
Regards, Arie de Muynck
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Right now it's an unclocked control... consumer product, but I've thought of that. I'll nudge the customer. ...Jim Thompson
Since you are rolling your own start with a 7474 D flop with /pre and /clr. That would give you your Q and /Q. Strip out the clk gates and just drive the /pre and /clr. The old data sheet for the SN7474 is still on the TI web site with the TTL schematic. The newer parts like the 74ahc74 have logic diagrams. What is your A->out timing budget?
in
BJim, If I understand you it would work if you could just add a bit of delay in the upper path, (stealing Andrews artwork)
__ A ---o----delay----| \ | here | )o-. | .--|__/ | | | | | __ | | __ '--| \ | '--| \ | )o--o | )o---A xor B .--|__/ | .--|__/ | | | | | __ | | '--| \ | | | )o-' B ---o-------------|__/
Does a non-inverting buffer add two propigation delays? Some little RC thing sounds dicey and I don't know if you can do a C when you roll your own.. (out of Silicon I assume)
George H.
=A0 =A0 ...Jim Thompson
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You could derive the latch signal from a delayed A and not need a clock. Art
And of course it needed some pull-ups on the O.C. drivers as well...
pull-up | A --+-- E1 -- B2 pull-up | pull-up C1 -- C2 --+--- OUT | B --+-- B1 -- E2
Arie
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Good point. Since chip is Mixed-Signal, delays are easy ;-) ...Jim Thompson
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This is mostly my insane desire for aesthetics. I'm seeing an asymmetry and it annoys me... does no harm, but it annoys me... I like perfection ;-) ...Jim Thompson
=A0 =A0 =A0 ...Jim Thompson
A ,=A0 =A0 ...Jim Thompson
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Is there some problem with transmission gates...only asymmetry will be TLH-THL skew... Please view in a fixed-width font such as Courier.
. . . . . . . . . .--------+--------------------. . | | | . | |\ o /| |\ o /| . | VSS-| > < |--. VDD-| > < |---. . | |/ | \| | |/ | \| | . | | | ____ | | . | | +->Aout | | . | | | | | . A>-+-------|--------+-----|--------------+ +->Aout . | | | | | | . | | | | | | . | | | | | | . | | | | | | . | | |\ o /| | |\ o /| | . | | VDD-| > < |--' VSS-| > < |---' . | | |/ | \| |/ | \| . | | | | . | |\ | | | . '--| >o-+--------+--------------------' . |/ .
r
=A0 =A0 =A0 ...Jim Thompson
=A0 =A0 ...Jim Thompson
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Please view in a fixed-width font such as Courier.
. . . . . . . . . .--------+--------------------. . | | | . | |\ o /| |\ o /| . | VSS-| > < |--. VDD-| > < |---. . | |/ | \| | |/ | \| | . | | | ____ | | . | | +->Aout | | . | | | | | . A>-+-------|--------+-----|--------------+ +->Aout . | | | | | | . | | | | | | . | | | | | | . | | | | | | . | | |\ o /| | |\ o /| | . | | VDD-| > < |--' VSS-| > < |---' . | | |/ | \| |/ | \| . | | | | . | |\ | | | . '--| >o-+--------+--------------------' . |/ .
Please post a picture of your wife. ;~) Art
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Not bad for 70 years old, huh ?:-) ...Jim Thompson
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An understatement for sure. Art
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=A0 =A0 =A0 ...Jim Thompson
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I'm guessing Jim blocks google, otherwise he would have seen the several posts within an hour of his question telling him that muxing between control and !control would give him what he's asking for
-Lasse
rt or
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=A0 =A0 =A0 =A0 ...Jim Thompson
a=A0 =A0 =A0 ...Jim Thompson
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I'm sure Google is shattered...If you have a Google account then a new menu pops up allowing you to report all that spam, and they actualy remove it within hours, so Google Groups ends up looking clean, if someone takes the time to report the spam that is.
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It is that sort of desire and annoyance that can keep things from causing trouble later. Good for you.
Cheers, John
Oh, much better would be to make a differential driver circuit. I'd suggest some relevant chips, but I think you said you were building it from primitives.
Jon
I'm doing a high-speed 3.3V to 5V translator, where "5V" may be just about anywhere 3V to 5.5V ;-)
But I think I've figured out a way to avoid the funny "lumpy" risetime I'm seeing. Looks like, rather than perfect delay match, sequencing delay mismatch depending on transition direction may smooth it out. ...Jim Thompson
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