Instability Problems with UDN Series Power Drivers?

Maybe coupling between input and output of optoislator, due to layout issues or?

Suggest earth on the nonisolated side may be part of the problem.

Best regards, Spehro Pefhany

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I'm looking at those two "floating" nodes and wondering what pulls them down so the OFF condition has some RFI noise immunity. The '2982 has a rather high Zin and no internal pulldown resistor. The PS2806 base also has a high Zin, and no internal pulldown resistor, but at least its area is small (I prefer optocouplers that give you access to the PT base so you can add an "off" bias-current resistor the PD has to overcome before the part comes ON).

OK, so at a minimum I'd add a nice 3.3k or so here,

. PS2806 | . |/------------+ . ---| |`.| . |\\>-+------| >------- Out . | |.'| UDN2982 . '--/\\/\\---+ . 3.3k | . gnd

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 Thanks,
    - Win

"W Letendre" schreef in bericht news: snipped-for-privacy@g43g2000cwa.googlegroups.com...

Darlington opto's have a very high current transfer ratio, so there might be a bigger leakage current than you expect, and already raising the UDN2982 input to a dangerous level. I'd place a resistor between input and ground. 10K perhaps.

And delivering 24V into the UDN2982 when the opto is on, seems a bit much as well. At an estimated 4mA, that is 100mW per input. Or 800mW for the entire device. I'd put a 5V regulator in it, to feed to high sides of the opto's.

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Thanks, Frank.
(remove \'q\' and \'.invalid\' when replying by email)

Gack. Look at that input circuit. Yes, a resistor to ground on each input.

Good point.

Best regards, Spehro Pefhany

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Did try adding current shunt resistor, as well as series voltage drop resistor (to limit UDN ship input voltage to legal max of 15 VDC) without any relief from noise problem. Capacitive bypass worked, but, damned if I know why. This is circuit that appeared to work:

+24 VDC _____ | |/------------|----------------------------* Opto | |/--| | |\\>-------| |`.| |\\>------/\\/\\/\\----*----------| >----- Vout PS2806 4.7K | |.'| | | UDN2982 ----*----- | | | | | | ----- > | --- < ----- - 10 K > ----- < | 0.1 uF > | | | | | ----*----- | ----- --- -

Seems to require that cap to isolated GND; still get noise without it.

W Letendre

Tell us more about the layout. How far from the PS2806 to the UDN2982?

Best regards, Spehro Pefhany

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Lateral seperation ~ 15 mm. Current layout uses DIP parts; revising to SOIC, as some of the parts on PCB are being discontinued in through hole.

Board is 4 layer, with internal split plane, internal and isolated grounds. Split between planes runs down center of opto isolator chip. Trace placement rules are 10 mil trace, 10 mil seperation (0.25 mm, give or take). Would have thought that was due diligence against coupling problems on PCB, but, here I am scratching head and hoping not to be on an airliner to South Korea next few days...

May be worth noting that the internal and isolated power supplies are distributed on trace layers, not as planes. Also, bypass caps were not placed so generously as I would have liked; layout artist omitted bypass altogether on isolated power supply, which has been object of considerable (so far fruitless!) suspicion so far.

W Letendre

Well, it sounds about perfect to me, even with that high-impedance input node, and you say it doesn't solve the problem with 10K on the input. umm.. despite what you say below, you don't happen to have a *power* plane that isn't split or something blindingly-obvious-in-retrospect like that? If you hold the bare board up to the light you can see through it where the optos are, right? And the power planes (if any are present) are not joined somewhere else? I'm just thinking that power planes are normally specified as negative, so it's possible the board could have an internal floating plane by default.

Sounds like it ought to be sortable remotely. But, hey, I'd be happy to go fix it for you for free (out-of-pocket costs only). Faster than you can say "kamsa haminda". ;-)

None of that sounds serious enough to be causing the problems, with the possible exception of that power supply. Maybe it has junk on it that's getting coupled through the darlingtons. A regulator would deal with that potential issue.

Best regards, Spehro Pefhany

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Hmmmm. Gettin' me paranoid, now. Took a look at bare PCB, to see if fab shop made internal planes wrongly. They look OK....

RC filter solution seems to work, and may be what I send out to field, but, it would be a comfort to know why! Still, won't miss going to Korea. Lovely country, but, the fabs there all cut their cleanroom "bunny suits" for guys 10 or 20 cm shorter than me. Nothing like an 8 hour shift wearing a uniform with a built in "wedgie" to make one question the joy of traveling!

W Letendre

The oscilliscope might not be fast enough to follow a really fast narrow spike, big enough to avalanche the input Darlington in the opto

- this could dump enough charge into the base junction of the opto-transistor to (briefly) turn on the UDN2982 driver.

IIRR opto-transistors have rather high base-collector capacitances, and your might be able to store quite a lot of charge.

You could also conceivably have a healthy flash X-ray source in the vicinity, which could also dump charge carriers in the input transistor ...

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Bill Sloman, Nijmegen

Interesting idea.

Personally, I avoid using photo Darlington optos in this sort of situation- you can readily get 100%-200% min CTR phototransistor optos and Darlingtons are pretty sluggish. They're a good compromise over the photodiode+transistor 6N136 type when only modest speed is required.

Best regards, Spehro Pefhany

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