Correct, I hadn't considered the single resistor. If the 'on' time is extended then resistor power dissipation will become significant. If short to match the required 'charging time' I'm sure the additional dissipation will be small.
-- Mike Perkins Video Solutions Ltd www.videosolutions.ltd.uk
Right, I wanted to ask this question some time ago: why do they consistently specify all the LEDs to handle up to 5V or reverse voltage, if in reality they can withstand much more, sometimes even up to ~100V? Once I wanted to make an insulated MOSFET activation indicator (with transformer coupling) and use the LED as a rectifier too. Worked on the bench, but I was afraid of using it in the field, as the reverse voltage was ~20V, i.e.
4 the value times the absoulte maximum ratings say.Best regards, Piotr
An extremely interesting lecture, didn't know about its existence. Almost as absorbing as the Platt's book on magamps, from 1958. And full of the almost forgotten art of pulse driving. Thanks, John!
Best regards, Piotr
Meh, probably between a couple of things:
(Typical GaN LEDs withstand very little breakdown current indeed, though AlGaAsP alloys seem to handle a few mA at least.)
#1 is a non-reason, but, humans, y'know?
That's probably reasonable enough for a red LED, but surge conditions will probably toast it instantly.
If the transformer is driven by logic (consistent conditions, free from surges), and the rectifier-filter is current limited, that's not too bad. Still, it's not bulletproof: ESD across the isolation barrier could induce enough [differential] dV/dt and peak current to break it.
It probably wouldn't last long, on a mains transformer, given the peak current demands, mains voltage swells, and occasional surge and ESD.
(Now, you could make a "boosted LED", that has a shunt CCS wrapped around it to carry peak currents, and a series diode or antiparallel shunt diode to handle reverse voltage. But you'd just as well replace /that/ with a rectifier and LED+R as usual. :^) )
Tim
-- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com
And this remark is probably sufficient. ;(
I don't need exact avalanche ratings, just a statement "this LED will survive -30V".
Sure, the efficiency is the key factor, but sometimes one needs a weird LED, as well as a weird FET. There are all kind of weird FETs (inluding the high voltage 32A depletion mode IXYS devices), but it seems that there are no weird LEDs (except of the optical transmitter equipment).
No low-side surges are possible in this circuit. Just a 500kHz 10V oscillator, a 1:1 10 turns toroidal transformer, the diode, a 3k3 load resistor and a MOSFET. The diode is Schottky, but I've tested that a low capacitance LED would work almost as well, additionally indicating the activity, at exactly 0 extra components count. Unfortunately, the reverse voltage rating prevents me from doing it seriously.
It is exactly how it works. In reality there are 60 of them, driven by a power logic shift register.
How, through the trasformer's stray capacitance?
Exactly, but it forces me to use 0201 component dust. Far beyond my senile manual soldering abilities. ;(
OTOH: what would happen within a LED constantly reverse biased to the half of its true brakdown voltage, whatever it might be? Nothing? Gradual degradation? If so, then what would be the physical mechanism?
Best regards, Piotr
I like to test parts for actual breakdown voltages. It's sometimes 5x or more over Abs Max.
LM1117 is rated for 12 volts input, but dies around 60. The LEDs in optocouplers are usually OK at 5x or 10x max rated reverse voltage. I tested some of the neat BFQ series SOT89 RF transistors, and they are good for way above rated max, as RF parts usually are.
-- John Larkin Highland Technology, Inc lunatic fringe electronics
Interesting, is that one qualified for automotive or anything?
Tim
-- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com
Many thanks for those two last posts, James; looks interesting.
Yeah, but "weird" == "expensive", and you're back to "sand" (0201's) again. :-/
Ah yeah, so your synchronous rectifier thingymabob (or something like it).
The peak currents would be on the order of ~100s mA, so that would be the worst case -- a supply voltage peak, maybe, and then add in gate capacitance being charged the wrong direction somehow, and suppose that gets dumped across the LED in reverse.
It would probably work quite well, but you'd live in constant fear of manufacturer changes, or just getting a bad reel or batch, or needing to do qualification and receiving acceptance testing. See first paragraph: "expensive"...
Yes. To use the simplest example, a 1:1 transmission line transformer, suppose you have a balanced 50+50 ohm source, and load:
Read the "RRR"s as Thevenin equivalent sources/loads (so, actually an R + ideal source). The actual sources don't matter, just that the resistances are matched to the TLT impedance, which is 100 ohms (and for completeness, say we use twisted pair and wrap it around a ferrite bead). So, if all four RRR's are 50 ohms, it's matched up nicely.
Suppose we drive a pulse into this, differential mode. Source(Pos) open-circuit voltage is changed instantly to +1*V, and Source(Neg) to -1*V.
The two Pos terminals are at the same end of the transmission line (and the Neg's at the other), so the voltage transmits instantly to the load, and we get a voltage divider. For the first instant of time, the RRR's (50 ohms each) act in series with the impedance of the transmission line (100 ohms at each port). Thus, Source(Pos) goes to 3/4 V and Load(Pos) to 1/4 V. And the Negs do the same, but negative (-3/4 and -1/4).
Thus, the total (differential) source OCV (open circuit voltage) is 2*V, and the load sees V/2 (which doesn't sound properly matched -- load gets only
1/4th the source OCV!). Meanwhile, the transmission line gets V/2 in one end, and -V/2 in the other end (which does sound properly matched!).Skip forward in time, by one propagation delay (the electrical length of the transmission line): now the -V/2 from the Neg port has propagated to the Pos port, and vice versa, and they superimpose and exactly cancel the incident voltage. Applied transmission line voltage goes to zero. Meanwhile, the transmission line ports are terminated into 50+50 = 100 ohms, which perfectly absorbs the wave, so we're done, no need to continue counting wave fronts!
At this point, the transmission line port voltage drop goes to zero. The Source(Pos) and Load(Pos) nodes are both at V/2, and the Neg's are both at -V/2. Source and load are matched after all; yay.
(While there's no voltage at each port, a voltage does exist /between/ ports. But this goes into charging the ferrite core with flux, so we don't care about it on an instantaneous basis.)
So that's differential mode: the transmitted voltage is -6dB for the first propagation delay, then 0dB (no insertion loss) after.
Okay, so that didn't answer your question, but it sets up for it. Now that we've got this excellent framework, turn it sideways: drive a voltage between the ground terminals (or, flip one of the voltage sources, so they are in-phase rather than opposing), and see what differential voltage comes out!
If Source(GND) instantly changes to V, then the same thing happens again: V/4 drops across each R, and V/2 goes into each transmission line port. Signs are just flipped -- the Neg side isn't negative this time.
The applied difference remains zero, which is great -- but, notice Vcm/4 appears across each load resistor. If you're doing a gate drive coupling transformer, and you have stupendous dV/dt (like the low-nanoseconds edges seen in GaN inverters), you just burned your driver IC because you've got fully 1/4th the output voltage applied to its input pin! Even if it's a more conventional stimulus like ESD, the risetime is comparable, and you can blow things out (or at least cause upsets, by exceeding the input CM range of a differential receiver circuit) all the same.
Now suppose we intentionally unbalance it. Change the Neg side resistors to
0 ohms (the Pos side stays at 50 ohms each). Now it's common-ground, which is perhaps more representative for a simple gate driver circuit. (Note also that, while it might be tempting to use unbalanced transmission line here too, you don't gain anything because both sides can't have the same shield as local ground! :) )When the CM step is applied, the Source(Neg) pin goes to V, while Load(Neg) is held at 0 (just to make this convenient). The Neg port has a full 1*V applied to it. On the Pos side, we again have a voltage divider, and the Pos port gets V/2. Thus, the load sees a differential of V/4 (Load(Pos) = V/4, Load(Neg) = 0) and a common mode of V/8.
After one propagation delay, the Neg side 1*V arrives at the Pos port, and the Pos port's V/2 reflects off the Neg port (which, since I didn't define an impedance souring this common mode signal -- oops -- just means it acts as a short of zero ohms, and reflects after two prop delays; that's still fine!). Now the Pos port has 3V/2 on it, so Source(Pos) is at 5V/4 (it overshoots!) and Load(Pos) is at -V/4 (it bounces!).
After two prop delays, the V/2 originally launched from the Pos port, has reflected off the Neg port (which is effectively a short circuit), and returned again. (The wavefront is terminated into 50+50 = 100 ohms, so is absorbed. The Neg port's wavefront also got absorbed, previously, by the way.) This superimposes on the V/2 initially present, so the Pos port has
1*V across it. Thus, Source(Pos) = Source(Neg) = 1*V, and Load(Pos) = Load(Neg) = 0, so Vdiff and Vcm are both zero again.In practice, we would expect to see a blip about 25% of the CM edge's height, a full reversal of that, and then silence (with some drool and ringing as it returns to zero, because of real-life messiness).
With respect to frequency, the transmission line has a sinc(F) sort of response (because it has a rect(t) time response!), so for lower frequencies, we expect asymptotically better CMRR. Namely: if we need 20dB CMRR, we need frequency about -20dB, or 1/10th the line's resonant frequency (which will be the 1/4 wave frequency), and so on.
In practice, gate drive coupling is kind of a stinky application: gates require low impedances (10s of ohms and less), much lower than is reasonable to achieve on a simple pulse transformer. So we accept a lowpass response. And, this means we can ignore the highest frequencies (transmission line behavior), and only worry about the asymptotic response. But if you put tiny diode junctions in there (like 2pF LEDs), that may not be so true, and if a fast enough signal should come along (like ESD), these events can play out just as told above!
Also in practice, if we're talking lumped windings rather than TL-style, then each winding has complicated self-resonances and impedances, as well as to each other. CMRR is limited by winding symmetry, too!
I wouldn't expect anything to happen.
I suppose there could be impurity sites (like of trace transition metals, or crystal defects?) that cause local excess leakage, but not hot-spot damage. This might be visible as anomalous leakage (i.e., not following the Shockley equation, but more like a series of zener/avalanche junctions of progressively higher BV and lower RS [1]), or anomalously soft BV.
Such a site could be subject to unusual wear, i.e., ions being pushed by electrons, ionic diffusion, etc. If it accumulates damage and leakage at the site increases, it would lead to eventual runaway and damage.
I don't know if this is actually a thing that happens, though. Just that it seems plausible!
Spot check: I have a red LED showing 34.08V at 0.11mA, 37.12V at 0.52mA, and
38.64V at 2.27mA. The voltage at each operating point is rising slowly over time, I think because of tempco. A faint orange glow is visible, which doesn't look like it's the whole die lighting up. (I don't have a vis-spec or grating handy to compare this emission to foward-bias emission.)In contrast, a silicon avalanche diode (1N4253) measures 32.80V at 0.12mA,
32.92V at 0.54mA, and 33.36V at 2.37mA. Nice and flat! (Also a much larger junction so it's kind of unfair, but even so, the purity/defect rate is MUCH better.) [1] Curious idea: if the defect rate is low (in a "smaller than 10^23" sense!), then the avalanche V(I) curve should be lumpy, not smooth. As you vary current, the voltage drop changes, but in a noisy manner, with the amplitude and frequency/spectrum of noise determined by the defect population. This should manifest similar to [ferromagnetic] Barkhausen noise, though not coming from hysteresis. Hmm...!Tim
-- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com
Close. :-) Indeed, the rectifier is a part of this device and powers 60 reverse phase control AC dimmers (12 and 230V). Here it is the channel controller. I prefer transformer coupling instead of VOM1271 couplers for its simplicity, lackof wear and much higher gate currents, which can be shaped by the transformer design.
Pre-mounting qualification of each specimen is not a problem due to a very small scale. What I really fear is the degradation of the LED parameters over the years, i.e. whether my today measurements will be relevant in the future.
Thank you very much for the time you spent on the extremely detailed explanation, I've learnt a lot of new things!
Best regards, Piotr
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