How do you design these days?

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Actually, yes!

John

We do 6 and 8 layer boards mostly, 1000+ vias being common, and the first run, usually 5-10 boards, costs around $1000, depending on turn time. I think we're paying about $150 for a stainless stencil.

John

Goina need a bigger hammer!

What good does that do? I guess I don't see the purpose of the insulator without a pad to solder to. Got a picture?

We use it for testing EMI and ESD shields, too.

I hunk of 30ga wire on a ground plane isn't bad. Al *lot* of 30ga wires on a ground plane isn't bad, either.

Under the SO8...

ftp://jjlarkin.lmi.net/BB_fast.JPG

John

That does change the equation. We have a couple of 4 layer boards, but mostly I try to keep to two layers. The one I just did uses a fairly bloated "single-chip" microcontroller, with external SDRAM and a TFT LCD interface. I have managed to maintain a fairly good groundplane on one side but this is the most that I would attempt on two-layer.

Cost of a couple of prototype boards is $140, that will allow me to assemble a prototype, program some firmware and bring the design to the point where I can confidently build 50 pcs next time. (Stencil cost is ~$300 unless my assembly company can put someone elses on it too).

Spehro Pefhany Inscribed thus:

I've never had a Morse taper fitting loosen due to side forces or had to use Locktite on one.

My experience is that it's almost always is cheaper to have boards made out of house (particularly as soon as you have enough vias that you're better off with plated-through holes rather than just soldering in jumper wires) than on a milling machine *so long as you can wait for a week-long turn*.

E.g., I can get, say, a 6"x8" boards with solder mask, silkscreen, plated-through holes/vias, and 6/6 traces and spaces for something like $100 if I'm willing to wait a week, whereas having our guys make a board like that with the LPKF machine we have is probably more like $500 and they start to look worried with designs rules tighter than about 8/8.

But it is nice to have around if you just need a single side+ground plane board (which often works fine for the RF test boards I do) and can live without a silkscreen or soldermask and would like the board *today*.

---Joel

We've been bitten by that. Originally some of the op-amps didn't even have their power pins labeled -- the idea was "Vcc is on the top, Vee is on the bottom" -- which of course is almost guaranteed to create an error if someone flips a symbols. So now we require that all pins are labeled...

I like Keith's idea of adding an alternative view so that power pins can always end up with Vcc on top and Vee on the bottom. It's always been a battle with the techs to get them to add more than one view of a part -- they were really annoyed when I asked for about a half-dozen views for the "universal" logic gate ICs (NC7SZ57 and NC7SZ58).

Some tools make this sort of thing easier than others... ORCAD, for instance, has the notion that a "part" can have only two views (they were thinking "normal" and DeMorgan) and exactly one footprint. Pulsonix is far more powerful in that if keeps symbols, footprints, and parts all in separate libraries and you can have a part consist of as many different symbols and footprints as you feel like. I seem to recall that PADS is somewhere inbetween those two extremes... (Obviously with any tools you can just create multiple parts to work around such restrictions, but then if you discover an error in one you have to make sure you correct all of the "equivalent" parts.)

---Joel

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I still use yellow wires. Age is showing ...

I have used Orcad Capture quite extensively, it actually has the concept of multi-part schematic symbols. There are two options, heterogenous or homogenous parts (i.e. different part symbols, or the same part symbol for all parts). If you define a 4 gate opamp as heterogenous with 5 parts you can create the 4 opamp gates with their repective pin numbers for each, and a fifth part with just the power supply pins only. That way you can flip or rotate the individual gates without affecting the power supply part. This is really useful with things like large FPGAs and bridge chips for example, and of course any multi-gate device such as opamps or some of those multi-gate CMOS devices. A minor bug-bear I have though is that if you forget to put the power supply part on the schematic it won't flag it up as having unconnected power pins in the DRC (at least in the older versions of Capture).

Mark.

Hi Mark,

Agreed, that is useful, and I do the same thing for, e.g., quad or hex logic gates (...also prompting whining from some people who haven't seen this done previously). For dual op-amps, I think to date I usually just add the power pins to both of them (and the DRC function tells me if I didn't connect them both the same way), but even there I can understand someone splitting off a separate power block, and it makes lots of sense for a quad op-amp.

The nice thing about CAD packages that let you have as many symbols as you want for a given part is that you don't have to debate these things with your fellow engineers or techs -- I want a quad op-amp symbol that shows all four op-amps together and 2 power pins, I can have it. You want 4 separate symbols plus a little power block, you can have it. Yet we're both still linked to the same footprint, the same manufacturer's part no., etc. (A more concrete example of this that I use is bussed resistor packages -- sometimes I'd like all 4 or 8 or however many of them displayed as one symbol right next to each other, other times I'd like all discrete symbols.)

I make the power block the first "gate," so it shows up immediately when you go to place the part. Hence it requires additional effort to forget about it. :-)

---Joel

That's how Eagle does it. You have four parts in a quad opamp. When you want to connect power to dedicated supplies other than, say, VSS and VEE or you want it to show for clarity you click "Invoke". That pops up the fifth part which is the power pins.

You haven't put any side pressure on one, then. This is a very common occurrence for woodworkers using their drill press as a drum sander; not a good thing to do.

Neat. I would have thought you would have just hogged out the foil underneath.

BTW, John, I've had some time to play with the fake caps and fake resistors. I looked up the pointer to your circuit in the archives but the pointee is gone. Any chance you could put it up again? Any other pointers would be very handy, too. I need something that's good for four quadrants (or at least bipolar currents). Thanks.

If I can get a two sided board in a day, I'll take it. We haven't been in the prototype circuit mode, so it's something new. New is bad.

I'll certainly think about prototype houses. I don't have anything planned for the immediate future, though. We're kinda slow in the hardware department, at least until the firmware guys catch up. :-(

Yeah, it doesn't have to look pretty. There are a lot of "tools" I'd like to have, too. Proto circuits would work fine. Wire on perf board works too, but it's such a PITA and mechanically unreliable.

That's the argument I get from the layout guy. I'd rather just have two heterogeneous parts, one "gate" and one power. That way I can define the part usage later. Power can be placed with decoupling. With power pins on both parts of a dual op-amp, showing decoupling gets difficult.

As you pointed out earlier, though, this can lead to corrections not being propagated to all symbols.

I make it the last, to get it out of the way. I generally create the "gates" from the front of the schematic to the back and the power page(s) at the rear of the schematic.

I know they exist (e.g., the guys at UltraCAD), but so far I've never worked anywhere where the layout guy was particularly "proactive" in the sense of suggesting interesting/potentially useful new ways to deal with parts management... they instead seem to always have a reason why, no, you can't do it the way you're suggesting (even though you've done so many times over somewhere else...). C'est la vie...

Yes, with ORCAD that is a limitation.

That's a bit more convenient, I just worry that I'll then forget it and that somehow a DRC run won't catch it either. (We don't have a "formal checklist" like John says he's working on to catch this sort of thing...)

That's how most of ours end up too. Things like multi-pin headers/connectors usually end up on the first page if they contain signals that go "all over." (I prefer to place one big symbol for, e.g., a header connector and then immediately terminate them in named off-page connectors. I've seen people break connectors into, e.g., 50 discrete pins and just placed them exactly where they were needed, but I've only done that once personally -- I like to see all the pins "together" to make it obvious whether I'm running, e.g., some high-power switched signals next to some millivolt level inputs.

The main campaign I go on WRT schematics is that, if your goal is to make it as clear as you can as to how the circuit operates, that effort is significantlly hampered by someone telling you there can only be one acceptable symbol for a given part. I even keep both a large and a small BJT symbol around and use the big ones for power (or otherwise "really important") devices and the small ones for generic switches other "lesser importance" functions.

---Joel

Ayup! It's like *work*!

We don't have such a checklist either, but it's pretty hard to forget the power "gate" when it has 70 pins. ;-) OTOH, I can see it happening on an OpAmp, of thirty.

Ours are at the back, but I too prefer connectors (all I/O) at the front. I like hierarchical design and if I can't have a real hierarchy, at least I'll try to make it look like it. ;-)

Ick! I prefer to go directly to off-page connectors, too. That way the nets get a real name (instead of an alias). I don't always, though. Having pins from one connector all over the place is just evil.

Agreed. It's dangerous having more than one, though.

I'm getting rid of most of the "unimportant" BJTs in favor of pre-biased BJTs (RETs). I made a symbol for them that's small, yet unmistakable. An SC75 shouldn't take a half a page. ;-)