Help Ram connections !!!!

Hi Guys , i have to use a 8 bits SRam to fix a 4 bits design , on the new ram i will have 4 data lines not use ,so Is it safe to leave these pins floating ??? can the Ram be unstable if they're not pulled up or down ???

Thanks

Reply to
BSL
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I\'d pull them either up or down (I prefer down) through largish
(10k?) resistors since you probably won\'t know whether the part will
be READ or WRITE during power-up and you won\'t want to short the
pins to Vcc or GND if it comes up WRITE.
Reply to
John Fields

Why does it matter? Are the pins Bi-Di (then read would be a problem)? CMOS inputs shouldn't matter where they're tied to as long as it's inside the rails and not in the threshold region. I wouldn't short inputs together because it would increase fan-in and power consumption (slightly) for no advantage.

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  Keith
Reply to
krw

So Keith , do i leave the 4 unused data bits floating ???

Reply to
BSL

No, you never ever leave any chip input floating. In this case, since it's RAM, strapping the pins to either Vee or Vcc would be OK, as long as you perform a write to each byte before trying to read it - that way, you won't blow out a pin trying to drive it against a short. You might say that these pins are "don't care", but who knows what happens to the rest of the chip when one of the output drivers gets blown?

But in most cases, I recommend pullup resistors - in this case, probably something in the range of 22K ~ 100K, since it's CMOS and doesn't draw any significant current.

Hope This Helps! Rich

Reply to
Rich Grise

Never! A floating pin often wants to go towards the middle and it may draw lots of current. Tie them one way or the other.

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  Keith
Reply to
krw

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Because if the chip powers up in WRITE and you don\'t know what\'ll be
in the cell array,  You could short the I/O pin to either Vcc or GND
with the I/O pin in the opposite state.

Also read Rich Grise\'s post for more detail.
Reply to
John Fields

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Oops... I\'m thinking µC I/O.  Just backwards from RAM, so the
problem comes up in RAM READ.
Reply to
John Fields

Now I see, assuming Bidirectional I/O. I got the impression that the RAM in question had separate I/Os; ground the gazintas and float the gazoutas.

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  Keith
Reply to
krw

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