Eeyore hates American movies too...

On Sun, 08 Oct 2006 19:46:46 GMT, "Homer J Simpson" Gave us:

It likely had a different title than he remembers. If he knew the year, IMDB allows views of all made in a given year.

If he knows an actor, he can search that way as well.

Hello Jasen,

No, just in the middle of the code. Found an another example for the TI MSP series:

add.w &TAIV,PC ; Add Timer_A offset vector reti ; CCR0 - no source jmp CCR1_ISR ; CCR1 reti ; CCR2 reti ; CCR3 reti ; CCR4 TA_over reti ; Return from overflow ISR ; CCR1_ISR add.w #50000,&CCR1 ; Offset until next interrupt xor.b #001h,&P1OUT ; Toggle P1.0 reti ; Return from overflow ISR

Hello Mike,

I've read that reasoning in other docs as well. However, if an undefined condition happens I'd rather like the routine to go into the weeds and trigger the watchdog and not "muffle" the event.

"Joerg" schreef in bericht news:DtdWg.20766$ snipped-for-privacy@newssvr14.news.prodigy.com...

Looks like a jump table, timer_A used as vector. CCR0, CCR2, CCR3, CCR4 are empty slots.

Hello Frank,

Yes, but what good does the return from interrupt do at CCR2 through 4?

Hello Spehro,

Here is the whole thing:

#include "msp430x20x3.h" ;------------------------------------------------------------------------------- ORG 0F800h ; Program Reset ;------------------------------------------------------------------------------- RESET mov.w #0280h,SP ; Initialize stackpointer StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT SetupP1 bis.b #001h,&P1DIR ; P1.0 output SetupC1 mov.w #CCIE,&CCTL1 ; CCR1 interrupt enabled mov.w #50000,&CCR1 ; SetupTA mov.w #TASSEL_2+MC_2,&TACTL ; SMCLK, contmode ; Mainloop bis.w #CPUOFF+GIE,SR ; CPU off, interrupts enabled nop ; Required only for debugger ; ;------------------------------------------------------------------------------- TAX_ISR; Common ISR for CCR1-4 and overflow ;------------------------------------------------------------------------------- add.w &TAIV,PC ; Add Timer_A offset vector reti ; CCR0 - no source jmp CCR1_ISR ; CCR1 reti ; CCR2 reti ; CCR3 reti ; CCR4 TA_over reti ; Return from overflow ISR ; CCR1_ISR add.w #50000,&CCR1 ; Offset until next interrupt xor.b #001h,&P1OUT ; Toggle P1.0 reti ; Return from overflow ISR ; ;------------------------------------------------------------------------------- ; Interrupt Vectors ;------------------------------------------------------------------------------- ORG 0FFFEh ; MSP430 RESET Vector DW RESET ; ORG 0FFF0h ; Timer_AX Vector DW TAX_ISR ; END

Ok, normally one would not disable the WDT and and if for some reason the HW misses CCR1 it should run into the WDT time-out, not just return and pretend as if nothing happened, I'd think.

Quick guess without refreshing my memory on that series..

^^^ this bit adds to the PC (program counter) and puts results in the PC, so the next instruction executed will be offset by the other operand. The first part of the below thus has an implied label in front of each line...

It would be nice if this was commented, and if there was some sanity checking before potentially sending the processor off into oblivion (maybe you snipped it).

Best regards, Spehro Pefhany

"Joerg" schreef in bericht news:k9eWg.20782$ snipped-for-privacy@newssvr14.news.prodigy.com...

The programmer has decided that nothing should happen, in case of such interrupt. Since add.w &TAIV,PC jumps into the table, the table needs to contain *something* to return back to normal operation. He could have written something like jmp CCR2_ISR and place a nop + reti there, or just a bare reti there, but the way he did it is faster.

Could also be a work in progress ;)

Hi Joerg,

I agree. I didn't include my comments on what I thought of that technique, but if you are debugging someone else's code, you have to be prepared for anything. Sounds like they may have had some glitches or noise spikes that sent the processor off to lululand. Much better to fix the hardware, then write clean code.

Regards,

Mike Monett

Antiviral, Antibacterial Silver Solution:

Revenge of the Killer Tomatoes ?:-)

...Jim Thompson

Often the case - 'just in case'.

Some of those old low budget movies were re-released under different names, but the title was definitely, "The Claw". I remembered it because my family joked about it for over a decade. It ran about every three months on a local TV station's Saturday morning bad movie marathon. They acted like they were showing the latest and greatest movie, but they all belonged on MST3K.

Hello Frank,

Probably so. But still, since the other interrupts aren't supposed to happen the program should not return to normal operation but expire the WDT instead. Then the sirens and warning lights go off and the operator of the unit would know that something must have broken.

This one didn't look like work in progress ;-)

Hello Mike,

This one looks ok otherwise, just not quite clean to me. I am not a code guy but had to get involved in it a few times. Some of what I saw over the years appeared to be the SW equivalent of duct tape.

Okay, this is very close to the (skeleton) recommended ISR handler. The value of TAIV is constrained (probably by hardware) to be between

It's fairly common across processors to have shared interrupts and thus the ISR has to determine the cause of the interrupt and then branch to individual interrupt handling sections, or just dump back and restore context with an reti or equivalent.

In this case, after the offset vector is added to the PC, the next instruction executed is somewhere in the C0..C7 range, so if you can handle it with a single 16-bit word (like reti) you do it, otherwise you jump to the required routine (or fall into it at the end). This is pretty ugly stuff by HLL standards, but quite normal in M/C language programming and very efficient.

Best regards, Spehro Pefhany

Returns from the interrupt! And thus restores context and the stack. If you don't RETI you'll overflow the stack. You need to put words in those locations so it does *something* when those vector values turn up. You could replace the first three with nops but that would save no space and would take a bit more time to return. You jump *directly* to the one of the eight lines after the add.w &TAIV, PC instruction.

Best regards, Spehro Pefhany

On Mon, 09 Oct 2006 01:28:58 GMT, "Michael A. Terrell" Gave us:

Could it be this one?

"Joerg" schreef in bericht news:xYhWg.14370$ snipped-for-privacy@newssvr27.news.prodigy.net...

It's a choice, but you never get away with that in the medical industry.

(Now you can reply with something like 'point taken') ;))

I never design for a WDT to save my ass - but just let it reset and - depending on application - do a cold reset or a warm reset with a critical warning and then freeze up the damn thing. May well be that the interrupts don't happen, or should not happen, but why code havoc for such unlikely events? You might as well service them silently, as is the case here. Or have them set a flag, and turn on a sirene - if you must - but let the system continue as healthy as possible instead of letting it go bananas first and wait for the WDT. That is very dangerous anyway, because it can also go bananas, and not trigger a WDT but sort of return to normal operation with severe 'brain damage'. Remember, any system that experiences a restart by WDT is more or less broken already. And it should be an escape for hardware related problems, not software - ideally. It is good practice to provide harmless vectors for interrupts that are not used or should not happen by design.

Tell me why you are digging in it? ;)

It might be, but who knows? I haven't seen it for over 20 years, and the IMDb states that the cover art shown has nothing to do with the actual movie. The bits of the plot listed in the Memorable Quotes page are similar, but without seeing it, I can't be sure. The Amazon.com link says it is not available. If it was cheap enough I would add it to my collection.