Probably so. I've never designed repeaters myself, all of this stuff comes from palling around with some of the leading lights of the field.
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics
160 North State Road #203
Briarcliff Manor NY 10510
845-480-2058
hobbs at electrooptical dot net
http://electrooptical.net
Which is more or less what I went on to say in the next paragraph - you seem to suffer from premature ejeculation.
Which didn't have much to do with the point that the Motorola ECL data books used formulas for trace impedance that only worked well over a narrow - if useful - range of trace impedances. It's entirely relevant to the point that Jim Thompson doesn't have to know much about laying out printed circuit boards for signals with short transition times, but Phil didn't bother to make it clear that he was addressing that particular question.
At current ECLinPS speeds everything gets averaged over a few millimetres of track. The extra capacitance implicit in a right-angle bend on a 5OR track might be perceptible, but you can pretty much eliminate it by chamfering the corner, or making two 45-degree bends in quick succession.
It's an entirely valid point, but you inserted the comment a couple of paragraphs further down the post than you should have - it looked as if you were commenting on the limitations of the Motorola ECL application notes (which were perfectly okay, though they should have included a caution about the range of validity of the trace-impedance expressions) rather than on the sort of experience Jim Thompson might have had in laying out transmission lines (very little to none).
You suffer from nostalgia for the times, decades ago, when you actually did things... most of which didn't work.
That's what the ancient Moto book said. It was stupid at 10K speeds and it remains stupid at EclipsPlus speeds. I can barely discern a right angle with a zoomed-up 30 ps TDR edge. The weave of the fiberglass changes the impedance more than a sharp corner. Vias are hugely more important than right angles.
I do feel a certain amount of nostalgia for the times when I did things - which all actually worked when management didn't cancel the projects before we'd got to actual hardware. Management did frequently decide that they couldn't sell the stuff that I was allowed to get working.
All of this is entirely irrelevant to the observation that you went off at half-c*ck, busily saying pretty much what I'd already posted, but you couldn't find a way of justifying that, so you posted one more of your inaccurate insults instead.
Obviously.
I'm a bit surprised that you are bothering to do time domain reflectometry on FR-4 boards. Rogers make a bunch of substrates that work rather better at very high frequencies. A Cambridge Instruments we made the outer layers of six layer boards for the GaAs parts with isocyanate-resin-bounded Teflon cloth. The inner layers (that weren't exposed to the GaAs signals) were regular FR-4 which kept the board as a whole rigid - they were triple extended Eurocards and we didn't want them flopping around.
Our printed circuit board supplier charged us extravagantly for the boards - he had to buy a lot more of the isocyanate-resin-bonded Teflon cloth substrate than he need to make up our first batch of boards, and he knew we were pushing the state of the art, and - very wisely - wasn't prepared to wait for us to order a production batch of boards to cover the expenditure.
Well, we connect it to an FPGA. That takes, typically, about 30 or so FPGA balls. But we do get to use a lot of the ARM i/o pins, for stuff like ethernet, slow digital and analog stuff, SPI, uarts, serial flash management, dipswitches, LEDs, stuff like that, so we get most of those FPGA pins back. That, and the cost issues, have so far kept us from putting a processor inside the FPGA.
The uP can also manage FPGA configuration, like multiple config images and user code upgrades, which the FPGA has a hard time doing to itself.
I was talking about a Motorola data book, and you responded with a personal insult. You do that sort of thing a lot here. It's not surprising that people tended to not hire/keep you.
Probably the cost of the boards contributed to the overall project failure. We do picosecond stuff on FR4 all the time. I do TDR and other tests on boards so I can understand them and learn stuff, and make sure my suppliers are doing the stackups right, and so that I can separate what matters from the masses of hand-waving "theory" that folks like HoJo sell.
The only thing you were pushing the state-of-the-art on was expense. The Moto ECL and GBL GaAs parts would work fine on FR4.
The exotic substrates seldom make sense for digital logic. If you have a *lot* of layers, over 8 maybe, a lower Er is handy to keep the trace widths and impedances practical.
RF stuff can sometimes justify exotic laminates, to keep filter Qs up and noise figures down. High thermal conductivity laminates could be interesting.
Please identify the personal insult - I wasn't actually intending to insult you at that point so it would be useful if you indicated which of your hyper-sensitive toes I trod on.
The machine was priced to recover its development costs, not it's component costs. Being "state of the art" was one of things that marketing liked about the machine. The bare printed circuit boards were expensive, but loading them with components cost more than buying the boards.
We didn't buy HoJo's handwaving theory back then. IIRR he wasn't peddling his stuff until the 1990s. We got hold of rather more reliable data from the microwave world.
We had a few nasty experiences with with GaAs pulses that got inadvertently routed over FR-4. The choice of the isocyanate resin- bonded Teflon cloth substrate was driven more by a wish to minimise potential risks than any deep analysis of what was going to happen to the pulse shapes by the time they got to the other side of a big board
- one of the things that really screwed the project was an initial desire to get it up and running fast, so design reviews were by-passed to get boards out to layout as soon as possible, in the best English tradition of not having enough time to do it right so you have to find time to do it over.
Once we'd got the printed circuit department to get the boards made with the buried layers in the right order, the boards materials didn't give us any trouble.
The half-nanosecond wide pulse generator for generating the stroboscopic flash of electrons inside the electron microscope was actually built on an alumina-loaded Teflon daughter board - we'd bought in a microwave consultant, and that was what he chosen. I'd got a similar circuit working fine on a polyimide board a few years earlier - HF transistors involve ran hot and the polyimide tolerated it better than FR-4, which turned brown and worried the customers and our service engineers - but it doesn't make sense to pay through the nose for consultants (no matter how flakey) and ignore their advice.
These boards were "mixed signal". We used essentially analog circuits to interpolate between the 800MHz digital clock edges - the aim was to determine when an external trigger had come in to about 10psec, and generate our sampling pulses at controlled intervals after that trigger edge, with a resolution of 10psec. The fact that we had a crap clock with some 50psec of jitter and our sampling pulse was 500psec wide didn't stop marketing from insisting on the 10psec resolution.
We stuck individual heat sinks on most of the faster logic packages, and blew a lot of air through the crate. When testing individual sticking out of the crate on an extender card (which was fun to design and get built) you had a big domestic fan blowing into your ear.
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