Some time ago I found this on the www:
Atmel, Digital Frequency/Phase Comparator (DFPC):
Is this DFPC (using 4000 or 74HC series logic) better that the phase comparators used in e.g. 4046, 74HC7046, 74HC9046?
When was the DFPC invented? Is it free to the DFPC for any purpose?
Glenn
On a sunny day (Tue, 15 Jan 2013 14:14:31 +0100) it happened Glenn wrote in :
Yes I think it is better, as it goes to phase comparator mode after frequency lock. The 4046 keeps switching back and forward.
Verilog example:
I dunno, but I impemented it in FPGA just a while back, with 2 diodes to drive a
1.5 GHz osc in PLL mode. I have seen it in many places...
It was invented slightly before dirt--patents long expired.
The two-output (Motorola) variant avoids the dead zone of the 4046 type PFD, at the price of a bit of extra ripple.
Cheers
Phil Hobbs
Yep, That's Ron Treadway's "9-gate-wonder" in our MC4044 part.
...Jim Thompson
acrobat/doc0475.pdf
I still wish that someone would make a TinyLogic part with just a 4046- style phase comparator. While I admit that mostly when I do something with a 4046 it's to get it out of the circuit and replace it with code in a processor, I do sometimes design them in. When I do, half the time that I shove a 4046 _into_ a schematic, it's with the intention of using the phase comparator 2 and nothing else.
Lessee -- VDD, VSS, in1, in2, out -- yup, that fits...
4046's have a nasty deadband.
I sometimes use an xor gate as a phase detector, or a d-flop as a bang-bang PD, but only for narrowband (VCXO) things where pull-in range isn't a problem.
We put a nice no-deadband PFD into an FPGA now and then.
Make it six pins...
VDD, VSS, IN1, IN2, OUT and a PIN for a resistor to ground to set the output current (Internal BandGap). ...Jim Thompson
But there are some things for which a phase-frequency detector just can't be beat (they're interesting critters to write in software -- you have to make sure you're sampling fast enough, and there are some subtle failure modes if you're not paying close attention).
Yes, figuring out how to do it with no deadband would be better.
I mostly use PD2 as an acquisition aid for a narrowband loop with a diode-bridge PD. Alternatively you can put a bit of positive feedback on the (integrating) loop amp, and make it sweep automatically when the loop unlocks, but PD2 pulls in faster.
You do need to get a 90 degree phase shift from someplace, because PFDs want to servo at 0 or pi. However, you have to do that anyway if you want a lock detector, and a Johnson counter is usually easy.
The nice thing about XOR and diode-bridge devices is that missing a cycle or two doesn't cause you to lose lock the way it does with a PFD.
Cheers
Phil Hobbs
Am 15.01.2013 18:38, schrieb John Larkin:
...
I'd like that PFD2, too! In SC-70 !!!
The 9046 is said to be better, but I have not used it personally.
PD,
The AD9901 is a nice alternative. It moves the deadband to the extremes of the phase range, where nobody is molested.
I recently rewrote it in VHDL, but we decided to stay with a FLL, so it is not needed anymore. Maybe I'll test it just for fun in a corner of a small Coolrunner..
regards, Gerhard
I'm fond of using a crystal-clocked shift-register for extracting data. They just coast on a missing transition...
I've also used this scheme on a satellite receiver.
You can also get fancy...
I've done a modification of this scheme to control maximum amount of phase "jerk" _and_ also lock-in gap. ...Jim Thompson
PD,
We use the 9901 in one of our ECL delay generators. It's an expensive power hog, but we get super low jitter.
Rob, my FPGA guy, has a nice PFD design. It uses two external diodes into a filter/opamp (my idea) so the FPGA outputs swing hard rail-to-rail, without any tristate charge-pumpy tricks.
On 15/01/13 22.06, Gerhard Hoffmann wrote: ...
...
Is there a very small cheap FPGA where a PFD2 can be implemented?
The smallest I could find at digikey and cheapest ($10 ! ) had 64 pins.
-What about a universal 16/24/28/32square pin 74HC/74LVC/... FPGA - burn your own (a)sync counter/PFD2/PLL/NOR/NAND/NOT/LCD-driver/... - and of course more complicated things?
-It is even possible to buy single gates today - example:
SN74AUC1G08DBVR - 74AUC1G08 - a dual input AND Gate:
Glenn
Probably needs another SC-70 for the 1V8 core voltage.
Gerhard
The '9046 is definitely better. I have used it in SONET retiming PLLs.
For those not in the know, the logic in the PFD is the same as that in the '4046, but the output is different. Instead of the hard P pullup and N pulldown, there is a P pullup current source and an N pulldown current sink. The currents are matched to perhaps 1% (although this is not guaranteed in the datasheet).
The '9046 output Z is alway high, unlike that of the '4046 which is modulated by the phase error.
Regards, Allan
(snip)
You're thinking of PLDs. You can get really old ones, on the expensive end of the price curve, from DigiKey for $5-ish. New, 48-pin ones are more like $2-ish in small quantities.
a XC9536XL-10VQG44C at digikey is 1.18$ in ones
-Lasse
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-bang PD,
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what would be the advantage of using diodes instead of just a tristate output or two ?
-Lasse
bang-bang PD,
One is that we don't care about the subtleties (drive strength, speed) of the tristate things. The UP and DOWN outputs each slam rail-to-rail, fast. We control all the time constants, independent of the silicon.
More importantly, we can program a bit of overlap on the two outputs and avoid a deadband like the 4046 type charge pumps have. The 4046 deadband can cause ghastly phase noise and jitter.
How many FFs do you want? There are some very low power devices from Lattice that come in low pin count packages, but not so easy to use, small pitch BGAs as small as 36 pins, 2.5 mm sq. They are targeted to the mobile device market so they are pretty cheap, I think they are well under $5 in quantity. iCE40xxxx, 1.2 volt core
Rick
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