Designing a high current (10A) voltage buffer

Hey there - so my job doesn't allow me to do much in the way of analog design, so for fun last night I decided to design a high current voltage buffer. The idea is that it'd take a 0-10V input, and would output the same voltage, except with the ability to drive up to about

10A. The design eventually evolved in my head into a PID controller using op amps driving a P FET. So I scribbled down some notes and passed out. This morning I drew it out, corrected a couple oversights, and chose some components. I have posted what I came up with here:

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The op-amp choice was very arbitrary - I just wanted a rail to rail quad op-amp, and the OPA4234 was already in my schematic capture program's library. I chose the FET a slight bit more carefully - I wanted a low on resistance FET capable of dissipating a lot of power while also being able to handle a lot of current. I ended up with the IRF IRLR9343. It can't completely handle the specs I gave - but it can get fairly close.

So - in this design R2, R3, R4, and R5 set the PID gains, with P = R2/ R3, I = R2/R4, and D = R2/R5. I put in fairly arbitrary values for R2- R5 - giving initial gains of 0.5 for all three. This would obviously need tweaking based on the application. Also, the resistor between the op-amp and the gate of the FET was a pretty arbitrary value - I put it in there to protect the op-amp, though it'll also significantly slow down the circuit.

So - can anybody spot any mistakes? I suspect there are at least a couple. Also - is there any way to do this on a unipolar supply? Any way to get rid of an op-amp? My only thought on getting rid of an op- amp was to make the summer into a combination summer/difference amplifier so that it'd sum the I and D terms while subtracting the -P term, but I couldn't find a way to make the math work out cleanly. Any other comments or suggestions?

Thanks!

-Michael

Reply to
Michael
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You won't need the derivative term, and you can combine the integral and proportional into one opamp by using a series r+c as the feedback element.

Make the gate resistor 33 ohms maybe; it keeps the fet from doing RF oscillations on its own.

John

Reply to
John Larkin

Is your supply capable of 10A? Driving the gate of the FET wouldn't gain anything. The op amp is doing nothing at all. You can't boost current without L & C.

Reply to
linnix

Yes. The gate looks capacitive, so, if the MOSFET is following only slowly changing voltages and the circuit is stable, the gate current will always be small. And most opamps have enough current limit in their output stages to protect the opamp for quite a while. The only real need for a gate resistor might involve preventing high frequency (RF) oscillations in the MOSFET, by killing the Q. But something in the 10 to 100 ohms range usually works better for that. A ferrite bead over the source lead is also sometimes used, but it will probably saturate with 10 amps DC in this application.

I haven't solved any equations, but it looks functional, if over complicated. It should be possible to merge all that gain network (5 opamps and all their resistor and capacitor input and feedback capacitors) into a single opamp.

Sure, if the input stays between those rails, and there is enough voltage to drive the MOSFET. A single +12 rail should do it.

How about 4?

Draw a single opamp follower. Add a MOSFET current booster to it, an inverting booster, in this case. This extra inversion will require that you reverse the inputs on the opamp. Build it, and you will find that it is not stable, because the internal gain versus phase of the opamp that made the opamp follower stable did not take into account the additional gain and phase shift of the MOSFET inverter inside the feedback loop.

You have to add some lead lag compensation to the feedback (and possibly to the input side) that approximates what you are doing with the PID construction, that lets you control the gain roll off and phase shift so that, at the frequency where the loop gain falls to 1, the phase shift does not approach or exceed 180 degrees, so that stable, negative feedback operation takes place. It can be done the one opamp.

I don't want to hand you a finished answer, right away, because I think you are having too much fun thinking about this, right now.

Reply to
John Popelish

[...]

  1. The design looks owerweighted. The whole PID regulator can be done in one opamp unless you need to adjust the parameters independently.
  2. You have Q1 in common source mode. Thus the transconductance of Q1 is included into the loop gain. I don't like this idea because it is a variable parameter. I would use rather use bipolar Darlington as the emitter follower.

Vladimir Vassilevsky DSP and Mixed Signal Consultant

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Reply to
Vladimir Vassilevsky

The Power Supply Rejection Ratio will really suck. You only need one op-amp to do the whole thing. The differential section won't work. You don't need a -12V supply. You didn't do anything to control the gm of the MOSFET section. Your design suggests a 10uF capacitor that I suspect you will have trouble with. 25nA times 100K puts the offset voltage at 2.5V. You are putting an heavier load on Vin than you need to. Your feedback path runs through 3 350KHz op-amps forcing you to use a low gain crossover frequency. You didn't provide for an anti- windup circuit. The output pulses high at power up. The resistor feeding the gate of the MOSFET is too high. You didn't show any bypass capacitors.

Other than this, its a great design.

Reply to
MooseFET

Its easier to just add a small source resistor to the MOSFET. You would still get nearly the full swing but have a gm that is well enough controlled.

Reply to
MooseFET

What is Q? I'm not familiar with that term.

I had that suspicion - I always tend to use way more op-amps than are really needed.

But the P term will initially dip below zero.

An op-amp follower - as in a buffer? (ie

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An inverting MOSFET current booster is what I drew, right? Or are you referencing something else?

I don't follow what the feedback system would be in this case. Can you elaborate on that?

Ah - lead/lag design - fun stuff. How do you implement a lead or lag controller with an op-amp? I've only done lead lag design with DSP systems - never analog.

By the way John - I'm not sure if you realized this or not - but this is Michael - the robot guy. Good to see you!

Thanks,

-Michael

Reply to
Michael

Why skip the D? I mean, it doesn't hurt anything - when properly tuned, it only helps...

On another note - something's been bothering me - would it be possible to make just a proportional controller? I feel like if I set the I and D gain terms to zero this thing would oscillate terribly, but looking back through my control systems textbook P controllers are shown to be stable, though they can have a steady state error.

So - where'd you get 33 from? That was one of those values that I just didn't have a clue about...

Thanks!

-Michael

Reply to
Michael

In my theoretical design - yes, the supply is infinite. I don't follow what you're saying about the op-amp not doing anything?

Reply to
Michael

In my theoretical design - yes, the supply is infinite. I don't follow what you're saying about the op-amp not doing anything?

Reply to
Michael

(snip)The only real need for

Quality factor of a resonant system. High Q implies sharper resonance and large stored energy, compared to losses per cycle. The gain and feedback capacitance from drain to gate can produce a resonant system that can self excite with some gate driver source impedances (oscillate).

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(snip)

No problem, if it helps you deal with all aspects of the problem, conceptually. But then you get down to the engineering aspect of merging all those features into a reasonable circuit.

Under what situation?

(snip)

Yes. The simplest opamp amplifier. ~infinite current gain, voltage gain = 1.

Your MOSFET amplifier is exactly what I am talking about.

The simplest idea is to switch the opamp inputs and take the voltage feedback from the drain, instead of from the opamp output. But that will almost certainly turn out to be unstable

Lead/lag refers to the phase shift of a given network. You also get a frequency response that comes along with it.

I did not realize. Nice to be thinking with you again.

The final feedback must, at DC have a gain of 1 from the MOSFET output back to the effective inverting input, just as it does with the simple 1 opamp follower (which has that gain at all frequencies, not only at DC).

But the feedback network (that can include signals from both the opamp output and the MOSFET output) can have other gains and phase shifts at other frequencies.

A very simple, though, perhaps sub optimal (not the highest frequency response) version would be a resistor from MOSFET output back to + and a capacitor from the opamp output back to +. This pair has a perfect gain of 1 at DC from the MOSFET output (since the capacitor has infinite impedance at DC). But above some frequency, where the capacitor impedance approaches the resistor resistance, the capacitor takes over as the effective feedback, and the MOSFET output no longer follows the input, but the opamp is kept in a stable feedback situation.

There are many variations on this theme that also include components connected to ground to make the feedback network some sort of voltage divider, and series RC loads on the output to narrow the range of gains and phase shifts possible as the load impedance changes.

If the actual load is fixed, things get a lot simpler. If the load can vary anywhere between infinity and 1 ohm, you have a lot more cases to deal with. This is one reason why a big follower booster is often used (emitter or source follower configuration). That configuration varies in its gain and phase shift a lot less as the load impedance varies.

Reply to
John Popelish

I was assuming that the op-amp and the fet were on separate 12V supplies, if that is what you were referring to. Sorry that that wasn't made clear.

I found one PID controller implemented on a single op-amp, but it didn't give a nice way of tuning - if you changed any component you'd change all three gain terms. Can you suggest a better method that allows individual tuning of gains?

Why?

I think I do with how the circuit is currently set up. The P section will be generating a negative voltage. Unless I completely change the circuit - I believe it is necessary.

How would you suggest changing the circuit so that it is controlled?

What's so hard about sourcing a 10=B5F cap? I don't follow. I didn't want the resistor to be any larger (being that the input impedance of the op-amp is in the Mega ohm range) - hence the large cap. I suppose I could compensate for that when setting the gain - but that's a little ugly.

Can you elaborate on this? I don't know what you're referring to.

I agree completely. I'll change R6 through R9 to 100Ks.

Like I said - the op-amp choice was arbitrary. I am really quite confused when it comes to choosing op-amps - when is fast too fast? I always hear warnings that really fast op-amps can cause really bad oscillations.

I am not familiar with this term. Can you elaborate on it?

I'm aware of that one. I don't agree that it is absolutely a bad thing

- I mean in some applications the output being low on startup could cause failures. How would one change the circuit so that you could control the initial Vout?

Another arbitrary value choice. How does one choose this value? I'm thinking that you would look at the gate capacitance and then choose a resistor such that the time constant (RC) had a period of half of the frequency you want the circuit to run at. You would also have to verify that that won't be asking the op-amp to drive too much current.

I guess I always feel those are just assumed :)

Hey now, I am stuck just doing embedded design at work - I'm rusty on all this analog stuff :)

Thanks, I really appreciate it.

-Michael

Reply to
Michael

I was assuming that the op-amp and the fet were on separate 12V supplies, if that is what you were referring to. Sorry that that wasn't made clear.

I found one PID controller implemented on a single op-amp, but it didn't give a nice way of tuning - if you changed any component you'd change all three gain terms. Can you suggest a better method that allows individual tuning of gains?

Why?

I think I do with how the circuit is currently set up. The P section will be generating a negative voltage. Unless I completely change the circuit - I believe it is necessary.

How would you suggest changing the circuit so that it is controlled?

What's so hard about sourcing a 10=B5F cap? I don't follow. I didn't want the resistor to be any larger (being that the input impedance of the op-amp is in the Mega ohm range) - hence the large cap. I suppose I could compensate for that when setting the gain - but that's a little ugly.

Can you elaborate on this? I don't know what you're referring to.

I agree completely. I'll change R6 through R9 to 100Ks.

Like I said - the op-amp choice was arbitrary. I am really quite confused when it comes to choosing op-amps - when is fast too fast? I always hear warnings that really fast op-amps can cause really bad oscillations.

I am not familiar with this term. Can you elaborate on it?

I'm aware of that one. I don't agree that it is absolutely a bad thing

- I mean in some applications the output being low on startup could cause failures. How would one change the circuit so that you could control the initial Vout?

Another arbitrary value choice. How does one choose this value? I'm thinking that you would look at the gate capacitance and then choose a resistor such that the time constant (RC) had a period of half of the frequency you want the circuit to run at. You would also have to verify that that won't be asking the op-amp to drive too much current.

I guess I always feel those are just assumed :)

Hey now, I am stuck just doing embedded design at work - I'm rusty on all this analog stuff :)

Thanks, I really appreciate it.

-Michael

Reply to
Michael

variable

I have to disagree. The voltage gain of this stage should be more or less constant regardless of load. That can be achieved by local voltage feedback, not by current feedback. Something like R or RC between drain and gate will probably do. Actually, it is fun to design RR output stages because you have to optimize several different things.

Vladimir Vassilevsky DSP and Mixed Signal Consultant

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Reply to
Vladimir Vassilevsky

It can be a huge noise amplifier, and gets quirky in a lot of situations.

Sure. But the opamp isn't ideal, and its gain will start to droop at some frequency, so it's never going to be pure proportional. And a lot depends on the load... if it's a pure resistor as shown, good, but any load capacitance complicates life, and the fet itself has capacitance. So the proportional gain may have to be very low to keep the loop stable, so then you's need some integral to get accuracy.

This ain't simple. Keep in mind that the transcondance of the fet will vary with current, so the loop dymamics aren't fixed. The safe thing to do is to make a *slow* P+I controller, slow as in low KHz loop bandwidth, if you can tolerate that.

Seems to keep most mosfets from becoming RF oscillators. Bigger values work too, but may slow down the fet gain and complicate the loop even more.

John

Reply to
John Larkin

I didn't follow that either!

John

Reply to
John Larkin

Maybe it's just me..but don't P Fets suck?.. :P I'm no pro but on a few occasions have compared N Fet specs and prices and P Fet specs and prices.. I currently have the belief that N power Fets generally outperform P power FETs.

Hope you can keep that P Fet junction temperature within safe limits with 10A max.

D from BC

Reply to
D from BC

I think N fets make better use of the silicon. In other words, for a given chip size, you get a higher performance fet if it is N-channel than if it is P-channel. Higher performance is defined as

1/(gate capacitance * channel resistance) or some such.
Reply to
John Popelish

This is because holes are so hard to move. Electrons are nice round little balls but holes have sharp corners all over the place.

The very nice thing about a P-MOSFET is the fact that you can switch the positive rail with a signal less than that. They make very nice "you hooked the battery up wrong" diodes and power switches for circuit sections as a result.

10A * 12V = 120W

If you buy a good one in a TO-218, you can do this with boiling water cooling. No L-N2 is needed.

If you add a small balasting resistance, you can parallel about 10 MOSFETs to get a more reasonable power in each. I suggest the balasting resistor because at low currents, the Tc is in the "this thing runs away" direction.

Reply to
MooseFET

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