depletion mode pmos for ultra simple logic level translation

Does it exist? Would it work? Could it be extremely cheap? Does anyone make a "small" surface mount pmos depletion device at all?

Vgs_off of "regular" JFET parts like a MMBFJ271 go up to 4.5 V, which is too high. Or for J270, the min I_DSS is too low.

- --- GND ----- | | |S-+ V O------G|| |D-+ | +------O V | \ / \ 1k / | | ~ -5V

Reply to
Simon S Aysdie
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Supertex may have something like that.

Reply to
Gary Reichlinger

I don't know of any.

How about common-base?

in--------r-----------+ | | e pnp b----gnd c | | +---------------out | r | | -5

It's not perfect, admittedly. But the pnp would be very cheap.


Reply to
John Larkin

Better yet common emitter:

Modified drawing:

The modified works better with logic that pulls down better than up. You don't want the resistors to be equal. They should be scaled to make the gain to get the required output swing.

This circuit also has a nice feature that it is a near constant output impedance.

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