DDS wisdom

How is that different from saying that the hidden bits of the phase accumulator remain constant? It seems like we're in violent agreement, except that you haven't noticed yet. ;)

If the hidden bits are always zero, then in each cycle, all the DAC codes repeat, so the waveform is ideally perfectly periodic. No?

Cheers

Phil Hobbs

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs
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Not so.

Our waveform generators are mostly used to test aircraft instrumentation and controls. Different requirements from RF. Our stuff is usually wideband: not, for example, 10 GHz but rather DC to

10 GHz. Just last week we were generating some 40 ps wide light pulses from a laser specified as a CW pump.

We do have a good 3 GHz spectrum analyzer, and we do look at the spurs and harmonic distortion of all of our waveform generators, both sine generators and arbs. And we do a little tweaking to improve things. We have had more trouble with filters and opamps than we have had with the DDS math and the DACs. ARBS have more potential distortion products than sine generators.

We care a lot about harmonic distortion; RF folks often don't. They work narrowband, and generally have bandpass stages downstream.

--

John Larkin         Highland Technology, Inc 
picosecond timing   laser drivers and controllers 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

It's pronounced "Keysight"

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John Larkin         Highland Technology, Inc 
picosecond timing   laser drivers and controllers 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

Five years from now it'll be "FuzzyNuts". You heard it here first.

Cheers

Phil Hobbs

Reply to
Phil Hobbs

Yeah, this was designed to get us maximum bandwidth but maximally nuke aliases. That zero really helps. The DDS/ARB clock rate is 128 MHz.

--

John Larkin         Highland Technology, Inc 
picosecond timing   laser drivers and controllers 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

Maybe they'll buy Rigol and put them out of business. Ditto!

--

John Larkin         Highland Technology, Inc 
picosecond timing   laser drivers and controllers 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

The paper *is* a bit hard. But you need to read RSI with Sturgeon's Law in mind - 90% of everything is rubbish. There's gold in the gravel, but it can take some panning to extract it.

Larsen N T 1968 Rev. Sci. Instrum. 39 1-12

on microdegree thermostats is the first example of that that comes to my mind.

--
Bill Sloman, Sydney
Reply to
Bill Sloman

The paper *is* a bit hard. But you need to read RSI with Sturgeon's Law in mind - 90% of everything is rubbish. There's gold in the gravel, but it can take some panning to extract it.

Larsen N T 1968 Rev. Sci. Instrum. 39 1-12

on microdegree thermostats is the first example of that that comes to my mind.

--
Bill Sloman, Sydney
Reply to
Bill Sloman

Ahh. Perhaps so.

I may remember this. I'll look into my trove at work.

I didn't. The prototype belonged to one of our vendors (who shall remain nameless), and they had developed it first for use in their own lab, with distant theories about maybe selling it as well. But no such product has appeared in their catalog. I bet they bought a Symmetricom

5115a, which would cost a lot less than the effort to develop a good enough unit. The vendor was trying to use their prototype DMTD unit for testing of a product being developed for my employer, and were getting unexpected results. My contribution was to figure out why.

The way Symmetricom (actually Timing Solutions, acquired by Symmetricom) solved the whole DDS spur and bump problem is by computing the sine wave amplitudes directly (no DDS chip) and loading it into a clock-indexed RAM unit. These numbers are fed directly to a digital multiplier (replacing an analog mixer). The actual frequency is tweaked such that there is no glitch when the memory rolls over. I got this from a Timing Solutions patent. That too is in the trove.

Joe Gwinn

Reply to
Joe Gwinn

Thanks for the review of your test equipment. You may be interested down to -60dBc or less. My interest is DC to 50GHz, and phase noise (jitter) down to -220dBc. Completely different level.

Like I mentioned above, your field is not in precision applications. Your credentials in broadband, time and frequency were also firmly established in the threads on the NIF project.

RF covers broadband as well as narrowband. We have to be good at both.

Reply to
Tom Swift

Thanks for the info. The 5115a was from Timing Solutions. Johm Miles developed a less expensive version called the TimePod 5330A and sold for US $4995.00:

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This was later acquired by Symmetricom, which now Microsemi. Theoretically, you can build one from information in the user manual:

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It runs on John's Timelab software available at

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Ulrich used the SR620 to find the phase bump in his post at

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Here's the user manual:

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With all these heavyweights and specialized equipment in the frequency and time field, I am extremely impressed that you managed to find the problem with no outside support. Congratulations!

Interesting. I'd like to find that patent. It may help solve a problem I'm having with generating small frequency offsets.

I have been searching for Timing Solutions patents with not very good luck so far. I hope you have some time soon to open your treasure chest and sprinkle some of the delights around.

Also, if you happen to come across anything from Holzworth Instrumentation in Boulder, please let me know. They have a propretary synthesizer technique that doesn't use plls and apparently no DDS. They can switch frequencies anywhere from anywhere to in 50us, and nearby frequencies in 5us. It is driving me mad to figure out how they do it. There is apparently nothing in the literature or anything on the web that talks about anything that can do that.

Reply to
Tom Swift

Hey, "Precision" is our middle name!

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--

John Larkin         Highland Technology, Inc 
picosecond timing   laser drivers and controllers 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

Dream on.

--
Bill Sloman, Sydney
Reply to
Bill Sloman

I am trying to explain to you that zeros in the lower bits of the phase step is not the same as a zero value in the truncated bits of the step size. Lets say there are no truncated bits in the phase step or accumulator just to make it easier to talk about. You are saying that anything you then program into the phase step word will give you a waveform that is exactly the same on each cycle of that waveform. This is not correct. Easy example, 4 bit accumulator with a phase step of 3. Modulus of 16 gives cycles of 0,3,6,9,12,15 - 2,5,8,11,14 -

1,4,7,10,13. Notice not only are the cycles not the same, they aren't even the same number of samples.

To have each cycle of the output be identical the modulus has to be an integer multiple of the step size. If you have a remainder when dividing the modulus by the step size, this remainder will be an offset at the start of the next cycle which means it won't be the same as the first cycle. With a modulus of 2^n that requires the step size to be

2^m. That is not the same requirement than having zero value in the truncated bits of the step size.

In fact, having zero in the truncated portion of the step size is not even a requirement as long as the ratio of the modulus to the step size is an integer. Again, with a modulus of 2^N, if the msb of the truncated portion of the step size is 1 and the rest of the word is zeros the Fout cycle will repeat exactly each cycle of Fout. As I said before, you will get larger spurs, but they will all be clock related spurs exactly the same as having no truncated bits with a clock rate half the actual rate. Easy example - Modulus of 16, 3 bits output, 1 truncated bit, step value of 1 - 0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7 and repeat.

So we are *not* in violent agreement... and it is you who hasn't noticed... yet. I hope this covers it.

--

Rick
Reply to
rickman

Some people define precision a different way.

Reply to
Tom Swift

I can't say I follow exactly what you are describing that is different from a DDS. But your description is not perfectly clear so I can't be sure.

First let's kick out the multiplier since that is not part of what is being done by the DDS, ok? If you want to feed a multiplier by the output of a DDS that's fine (a DDS does not require an analog output, it can be digital words) but the multiplier is not part of generating the sine wave unless I am totally missing something.

So you described a "RAM unit" filled with "sine wave amplitudes" indexed by "a clock" whatever that means. I interpret that as a RAM based sine wave look up table indexed by a counter which increments by some value on each clock. As long as that increment value is divisible into the table length (most likely the increment is a value of 1) the pattern will repeat exactly on each cycle of the output sine wave. What you have just described is a DDS! The index is the phase accumulator, the increment is the phase step, the table length is the modulus and the look up table is... well, the look up table, all exactly the same components as used in a DDS.

The only difference is that there is no truncated portion of the phase register because it *has* no lower order bits. This would be identical to a DDS that is incremented by 1 in the lsb of the non-truncated portion of the phase accumulator and clocked at N times the output rate where N is the table length (the modulus of the counter in the DDS).

It is a very limited function DDS however and can't generate any frequencies other than the input clock divided by M where M is the modulus of the look up table. If they want to increment the RAM index by some other value that is a divisor of M, then they can get output rates of Fclock*2^N/M. I expect they stayed with N = 1 and either had some way of generating a variable clock via a PLL or they just used one input and one output frequency.

There is no magic to a DDS, either black or white. The issues of a DDS are inherent in the math of sine wave generation by digital means with finite resolution both in phase (frequency) and amplitude. It doesn't matter if you use a chip called a "DDS" or roll your own, the result is the same if you use the same math.

--

Rick
Reply to
rickman

On 06/12/14 20.47, John Larkin wrote: ...

Hi John

Where do you buy L16 and L19?

120 Henry :-)

Glenn

Reply to
Glenn

What is the problem? Are you using digital synthesis?

How do you know they are not using a PLL or DDS?

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Rick
Reply to
rickman

On a sunny day (Sun, 07 Dec 2014 05:26:23 GMT) it happened Tom Swift wrote in :

Yea, precision is better than 5 % :-)

Reply to
Jan Panteltje

Am 06.12.2014 um 22:37 schrieb John Larkin:

No, Rigol will buy them.

They will follow the HP wafer tester operation.

HP-> Agilent -> Verigy -> outsource your hardware production to China until you are unable to deliver -> move it somewhere else (India IIRC) -> sell the farm to Advantest.

But you are right, too. While the Chinese could not produce the high end hardware, they were able to do a low-end tester that was compatible to Verigy's as a private stealth activity. Verigy had to buy it back, I heard saying.

Gerhard

Reply to
Gerhard Hoffmann

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