USB PHYs and drivers that folks have used

I'm putting together a system that requires a USB host and a USB device interface (two separate interfaces). On the 'device' side I need USB

2.0 high speed operation, on the 'host' side I can live with full speed operation.

Perusing OpenCores I see the USB 2.0 Function IP Core which seems like it should work for the device side. Some questions:

- What UTMI PHYs have people used with this core and can say that they work. The parts listed in the OpenCores document are no longer available, but the document is also 4 years old.

- Any uCLinux device drivers available to support all of this?

- Any other good/bad things to say about this core?

Also on OpenCores is a USB 1.1 Host and Device IP core which would work for my USB host interface.

- What USB transceivers have people used and can say they work. The OpenCores document lists a Fairchild USB1T11A and a Philips ISP1105, both of which are still available. Anything good/bad to say about either of these parts?

- Any uCLinux device drivers available to support all of this?

- Any other recommendations for transeivers?

For either interface, does anyone have any recommendations on other IP cores (do not have to be 'free' cores) that have been used and tested and have a uCLinux device driver available that should be considered?

Thanks in advance

Kevin Jennings

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"KJ" schrieb im Newsbeitrag news:

dont count on that. the core is used as basis for commercial core, yes. but the OpenCores version is not able to pass compliance testing IMHO

OC FS host-dev core has uClinux 2.6 drivers for NIOS-II

doesnt really matter, most of them are useable actually. for HS ULPI is way better as it takes less wiring.

for FPGA resource utilization the price for USB HS core is just way above dedicated silicon. eg adding a HS host-device chip to FPGA is cheaper than adding the PHYs an having an FPGA USB core.

whatever FPGA USB IP core you choose, you end up spending 3 to 12 months with verification and compliance testing.


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Antti Lukats

Antti, thanks for your 2 cents...and for figuring out that I'm talking about I'm talking about an FPGA implementation in the first place.

Noted, in specific areas of concern?

OK, I'll look harder, upon cursory googling I didn't run across anyone particularly advertising this.

I agree, but haven't found any ULPI interface implementations. Know of any?

In my case though the number of I/O in the system is the gating factor and will most likely end up determining the particular FPGA solution. With that assumption then, the functionality that one decides to embeds into the FPGA is based on how many system I/O pins can be directly controlled, and if not directly, then how cheap of an external part do you hang off the FPGA to implement the entire function. At present estimation, I'm not increasing the size of the FPGA in order to get more logic resources so whatever can be crammed in which minimizes overall FPGA I/O count and minimizes external parts cost is the driver.

Starting from a field proven core, reference design and driver though I'm off to a good start. I've done USB device on a board before with commercial silicon, just not yet had to deal with the USB functionality being in an FPGA and how stable/unstable/tested/qualified that may or may not entail. and googling did not give any such assurances which is my reason for querying for people who may have actually used the above mentioned cores or suggest ones that they have used and qualified for use in a product.


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I'm planning on using a Cypress CY7C67200 in a project. It has 2 USB ports and one can be on-the-go, meaning it can switch between host and peripheral mode as necessary. I really just need 2 host ports.

The chip is 8051 based with support hardware. However it seems to have some mode where it can get out of the way and be controlled by an external device, which would be the FPGA. It's all theory, I need to prove out functionality.


Reply to
David Ashley

Thanks for the input. One of the devices under consideriation is the Cypress CY7C68016 which is 8051 based with USB, and I'm guessing similar in some fashion to the 7C67200 that you're using (but I'll take a look maybe that would be a better choice for us too). The only 'problem' is that the system as a whole has on the order of ~150-200 I/O pins (depends on other system level tradeoffs that we're considering). The logic to support those I/O pins won't take up many of the logic resources of any FPGA that can support the I/O pin requirements.

Given that, and the fact that it appears (based on logic resources of the cores I'm looking at) that I can embed a processor and USB and the custom logic for all the other I/O all in one part and just skip over having a separate part just to get the USB functionality it seems irght now to be the least expensive product cost approach at the moment (even while adding the external USB PHY). But now the issues become:

- Has someone really field tested and qualified the core?

- Are their reference designs available upon which that qualification was based?

- Linux drivers to support the core?

Without 'yes' answers to each of the above questions it will drive up risk and development costs which need to be balanced into the equation for deciding.

I'm not unwilling to pay for the core to get the above mentioned assurances, but if someone has already done this exercise with the OpenCores version it would be worth the time to persue that avenue as well.


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