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DDS wisdom

Hi, all,

I have a gig coming in that will have me revisiting my thesis research from nearly 30 years ago, on interferometric laser microscopes. (Fun.)

Back in the day, I made a nulling-type phase digitizer at 60 MHz by driving a phase shifter with a 12-bit DAC (AD-DAC80), and wrapping a

13-bit successive approximation loop round it (AM2904 with an extra flipflop). With quite a lot of calibration, that got me a 13-bit, 2-pi, 50 ks/s phase measurement that I was pretty happy with. (The extra bit came from deciding which null to head for, which is why I needed the extra FF.) It was all interfaced to an HP 9816 computer via a GPIO card, and (eventually) worked great. I published one of my only two instruments papers on it (this was before I realized the total futility of almost all instruments papers).

The advantage of nulling detection is that you only need 1-D calibration tables for phase shift and amplitude, whereas getting that sort of accuracy with I/Q techniques requires a 2-D calibration table, which is a gigantic pain.

I need to do this again, 2015 style. The speed requirements are set by the acoustic delay in the AO scanner, so 50-100 ks/s is about all I can use. Rather than all that squishy analogue stuff, I'm planning to do the SAR in software and use a pair of AD9951 DDS chips, one to generate the desired signal and one to be the phase shifted comparison signal.

So far so straightforward.

What I'm less sure about is being able to keep the two channels sufficiently isolated to be able to maintain 12 or ideally 14 bits of phase accuracy. Even with a full-scale input, I'll need 85 dB of isolation to get 14 bits, and it gets harder with weaker signals. (There'll be a DLVA/limiter ahead of the phase detector, which will help.)

I've never used DDSes before, and I'd appreciate some wisdom from folks who have. How hard is that likely to be, and what should I particularly watch out for?

Thanks

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs
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Ha!

Got a sketch? "One picture..." etc.

Integrated DDSs work great, but generally need a good output lowpass filter. If you plan to do that twice, they'll have to track in phase pretty well over time and temperature. That shouldn't be difficult if you overkill on DDS clock rate, so the filter doesn't have to work hard. The DDS steps may average out in the final phase measurement, but would probably add squirmies-type noise, so some amount of filtering would be good.

If you were using an FPGA, you could just use a couple of DACs, and build your own DDS and phase shifter. Talking to the ADI chips, especially the serial ones, can be annoying.

--

John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

So the short story is that you're going to generate a sine wave, send it through some system, and you want to accurately measure the phase shift of what comes out of the system?

And you propose to do this using a pair of DDS chips for source and reference, with an analog phase detector? At 100ksps?

Do you drive around in a car that has a brand new engine coupled to a 1939 Lincoln gearbox?

Why not use one DDS to generate your sine wave, then capture the return with an ADC and do the phase detection digitally? 100ksps should be well within the capabilities of a Cortex M3 part, and if it isn't there are Cortex M4 parts and DSP chips to take up the slack.

For that matter, it may be easier to maintain synchronization by generating the sine wave in the processor and stuffing it out a plain old DAC. Then your DAC and ADC can have a common convert command.

--

Tim Wescott 
Wescott Design Services 
http://www.wescottdesign.com
Reply to
Tim Wescott

As the wise man said, there's nothing more dangerous than an idea, when it's the only one you have. ;)

Because the signal coming back is at VHF, and using nulling eliminates the need for 2D calibration, as I said. A DDS is less complicated to use than a 200 MHz ADC, for sure, and it saves me a boatload of Mini Circuits stuff getting the signal down to baseband, and several expensive and phase-distorting filters getting rid of all the attendant spurs.

It's $20 vs at least $200 for poorer performance and a lot more agita. No contest. Nulling is Good Medicine for this sort of job.

I'm mainly interested in advice about pitfalls using multiple DDSes for high spectral purity applications.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Ah. Much be comes clear -- I read your samples per second requirement to be a bandwidth spec. Instead, it appears that you're working with a (relatively) small bandwidth around a carrier.

To quote Rosanne Rosannadanna: never mind.

--

Tim Wescott 
Wescott Design Services 
http://www.wescottdesign.com
Reply to
Tim Wescott

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The frequency shifting stuff is just sketched, but this is the gist.

I'm planning to do a quick calibration run at power-up, using DDS1. There's a huge phase slope due to the AO modulator--there's about 10 microseconds of acoustic delay.

What's annoying about the serial ones? Just general clunkiness, or actual bugs?

Even if I were an FPGA guy, the project wouldn't support that much engineering, especially when there's this $20 alternative. If they sell

200 of these things over the life of the product, we'll all be very happy--they go for a million bucks apiece.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Den torsdag den 4. december 2014 21.04.06 UTC+1 skrev Phil Hobbs:

the AD9858 specs >72dB channel to channel isolation and they are on the same chip

-Lasse

Reply to
Lasse Langwadt Christensen

I've read all the posts so far and it seems you are generating a VHF sine wave to compare to a VHF signal you wish to measure the phase and amplitude of. I think I get that. But it seems the modulation of the VHF signal is pretty low rate so that 50 kSPS is good enough.

Then you ask about how to maintain enough isolation to preserve 14 bits of phase measurement. I think the isolation you are worried about it in the VHF range, no? That is the domain of RF design and not at all trivial. I think you will need to provide more info on design specifics.

I'm not clear on how you plan to do the phase detector. Is this just subtracting the reference signal from the signal being measured? You then scan the phase of the reference to find the null, scan the amplitude of the reference to optimize the null and then possibly repeat? Otherwise I'm not sure how you get both phase and amplitude out of this.

--

Rick
Reply to
rickman

DDSs have a forest of rational-multiple (but not necessarily harmonic) spurs, and it can be difficult to get them below -60 dBc unless you can place some restrictions on the frequency resolution.

Also beware phase jumps when the DDS phase wheel rolls over.

It's a long story. ADI has a very good tutorial.

Joe Gwinn.

Reply to
Joe Gwinn

The phase detector will probably be a diode bridge type, e.g. a Mini Circuits MPD-1. It's approximately a multiplier.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

I can pick my IF to be anything I like, which I expect will help.

Could you elaborate a bit? I thought the whole idea was to keep phase continuity.

Thanks

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Sorry to be so telegraphic about it--I've been justly criticized for my strong tendency to identify the category [stuff-I-learned-long-ago] with the very weakly related category [stuff-too-easy-to-require-explaining]. Most of it wasn't easy at the time!

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Joe is right. Most DDS are 32 bits. As I understand it, when you program in a frequency, there are some bits left over. When the counter rolls over, these do not align with the starting phase. Depending on the clock and output frequencies, there will be a phase bump every several seconds or so.

Time-Nuts has a number of threads discussing this issue. I could not find the particular thread I was looking for, but you might be interested in this one that has some very useful information buried in various posts.

The thread is "DDS in GPSDO design?", at

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There are several more threads on the same issue. You can search the archives using

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"Your Search String"

Reply to
Tom Swift

I'm not familiar with that type of detector. Will that give you an output related to phase and also proportional to amplitude?

--

Rick
Reply to
rickman

What counter is supposed to be rolling over? The phase accumulator is constantly rolling over and produces no anomaly when it does. I'm not sure what other counter there is?

Ah, this is something totally different. "Phase truncation spurs" is the result of having limited resolution in the sine wave lookup table. You can make the phase accumulator as many bits as you find reasonable and get very fine frequency control. But when that large phase word needs to be turned into a point on the sine wave the resolution is usually much smaller.

I worked on a design like this once and found that a combination approach can do great things to minimize this limitation. But ultimately there is a limit to the resolution of the DAC. This produces quantization errors which show up as spurs.

As long at the target frequency can be represented as the ratio of the step size to the counter modulus times the clock frequency, the output frequency will be exact.

--

Rick
Reply to
rickman

I found it.

An (unknown?) nasty feature of the DDS principle for time nuts applications

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Reply to
Tom Swift

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Why not use a real multiplier? Analog Devices have a couple of pretty good analog multiplier chips. AD734 and AD834 come to mind.

And if you are working at a fixed frequency, running the DDS staircase appr oximation to a sine wave through an integrator (with the right gain) turns it into a straight-line interpolation approximation to a sine wave, which i s a lot nicer, (and slightly easier to filter).

--
Bill Sloman, Sydney
Reply to
Bill Sloman

I can't say I fully understand everything he is describing. I'm not at all clear on what data he is collecting and graphing. But there are two issues involved. One is the mismatch in frequency because of the binary modulus used, the other is the truncation error introduced in generating the sine wave from the phase accumulator. I would say his graphs are looking at the jitter introduced by the truncation error.

Do you follow what data he is graphing?

--

Rick
Reply to
rickman

The AD9850 is a very old DDS. Some more recent parts

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offer a "programmable modulus module" that lets you get away from powers of two.

See page 14 of the AD9913 data sheet.

--
Bill Sloman, Sydney
Reply to
Bill Sloman

You might look at the AD9959. It has 4 synchronized DDS with 14 bit phase resolution. The channel isolation is >65dB but they don't specify the frequency range. Maybe it's better at lower frequencies. Having all the DDS in one package should give better tracking and lower drift. Here's the main features:

FEATURES

4 synchronized DDS channels @ 500 MSPS Independent frequency/phase/amplitude control between channels Matched latencies for frequency/phase/amplitude changes Excellent channel-to-channel isolation (>65 dB) Linear frequency/phase/amplitude sweeping capability Up to 16 levels of frequency/phase/amplitude modulation (pin-selectable) 4 integrated 10-bit digital-to-analog converters (DACs) Individually programmable DAC full-scale currents 0.12 Hz or better frequency tuning resolution 14-bit phase offset resolution 10-bit output amplitude scaling resolution Serial I/O port interface (SPI) with enhanced data throughput

Here's the Octopart price and datasheet. Not cheap, but it works out to $19.33 each if you end up using three.

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8548345.pdf

The AD9913 offers programmable modulus which might help. It's only $17

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5334308.pdf

Reply to
Tom Swift

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