AoE x-Chapters, using power MOSFETs as linear transistors

If I'm lucky maybe some TinyLogic schmitts are in the budget

Reply to
bitrex
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Why does it need a current source?

--

John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

They don't wanna pay for fast, low voltage op amps or logic and such. The circuit is gonna be in a semi-disposable product so cost is not no-object :(

Reply to
bitrex

The idea i'm messing with is bring the frequency down to something more sensible from the self-resonant of a couple hundred MHz with some low-loss inductance in series. Then use some negative resistance to compensate for the bad Q down there. Can all be done with FETs and BJTs, at low voltages.

I'm not under any kind of NDA so I'll post my result if I don't fail and am sent to work camp in forest.

Reply to
bitrex

Hey, if you guys don't cover it, who will? If it were easy, nobody would look to you for hints. :)

Bob Cordell brings up a few points in his book on audio power amps that you could repeat, or perhaps reference in the bibliography. E.g., source resistors alone may not be enough to make up for poorly- matched FETs, but FETs from the same manufacturing lot are usually easy to match. Lateral MOS behaves (very) differently than VMOS due to its tempco, but lateral parts are expensive and hard to come by. Gate resistors are more important than usual when paralleling FETs due to their tendency to oscillate, but there goes your phase response.

He suggests Zobel networks between the gate and drain terminals as an alternative. He also references a note on stability of paralleled FETs by Ed Oxner that I can't find.

-- john, KE5FX

Reply to
John Miles, KE5FX

** However, Larkin failed to do the *bleeding obvious thing* and use MOSFETs characterised for liner operation - ie Lateral types as made by Hitachi and others. Another example of his massive and insane prejudice against any and all things that even smack of "audio".

Wot a cretin.

.... Phil

Reply to
Phil Allison

Imagine anybody wanting to go faster than 20 kHz. The very _idea_!

Cheers

Phil Hobbs

Reply to
Phil Hobbs

You might want to experiment with piglet (Eric Wagner)'s idea of adapting a foldback current-limit circuit into a negative- resistance current source. We wrote it up for section 2x.12, in the AoE x-Chapters book, see draft copy on DropBox.

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I played with SPICE and added a 100uA 1.5-volt low-voltage version. It might be fast enough, if you scale the resistors to run it at 2mA or even 10mA. You might do a pnp version.

--
 Thanks, 
    - Win
Reply to
Winfield Hill

This cretin designs and sells a lot of electronics, and has fun doing it. I guess I'm dumb and happy.

Can you suggest some part numbers for high power n and p channel lateral fets? Something in the 200 volt, 400 watt ballpark?

I'm not fundamentally prejudiced against audio, but most audio design is really bad and mostly subjective. And boring.

We're using a very nice TI class D "audio" amp in a couple of designs now.

--

John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

On 7/26/19 11:29 AM, Winfield Hill wrote:

Hi Win, thank you, very nice!

If I'm allowed a more luxurious ~2.5 volts I came up with this modified Lambda diode circuit. It uses a JFET and pnp for the negative resistance, plus current mirror for biasing up the diode (it won't start into a lossy inductor on its own) and some Colpitts-like feedback.

The 10u has 35 ohms of series resistance to represent a somewhat crappy L.

I am concerned about Vgs spread on real JFETs, though, and whether a circuit of this topology will actually oscillate in the real world consistently. It can be fiddly to start in LTSpice. An AC 1 current source into the node shows a current gain of about 20dB into the inductor

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SYMATTR SpiceLine Rser=35 SYMBOL cap 1008 464 R0 SYMATTR InstName C1 SYMATTR Value 470p SYMBOL cap 1008 656 R0 SYMATTR InstName C2 SYMATTR Value 470p SYMBOL cap 912 16 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C3 SYMATTR Value 47p SYMBOL res 624 880 R0 SYMATTR InstName R6 SYMATTR Value 10k SYMBOL current -144 544 R0 WINDOW 123 24 108 Left 2 WINDOW 39 0 0 Left 0 SYMATTR InstName I1 SYMATTR Value "" SYMATTR Value2 AC 1 TEXT -472 768 Left 2 !.ac oct 10 100k 10Meg

Reply to
bitrex

Instead of "With a little prodding" you might substitute, "For a few haycorns". :^)

GH

Reply to
George Herold

What oscillation frequency do you envision? From 200 MHz down to low MHz? Will your circuit work up that high?, I see 10k resistors, etc.?

BTW, your added inductor esr doesn't show on the schematic (it's better to add parts to show these things explicitly).

--
 Thanks, 
    - Win
Reply to
Winfield Hill

Exicon has the ECW20N20/ECW20P20, which are 200-volt 250-watt parts in TO-264. ECF20N20/ECF20P20 seem to be the same dice, in TO-3. These types look as if they're two 125-watt dice in a single package.

Their ProFusion arm sells 'em directly.

As far as I can tell, Exicon is the only company making the lateral-MOSFET dice these days; there may be multiple companies packaging them.

Reply to
Dave Platt

1-2MHz is fine. The actual lossy inductor will be about 0.5uH to 4 uH, I intend to "swamp" it with a somewhat larger low-loss inductor so it starts reliably despite the variation. And then the idea is that the oscillation frequency will deviate a bit in response to the smaller one being stretched/compressed. a few 10s of khz deviation is fine

Got it

Reply to
bitrex

So... I would say though, that I am not particular enamoured of the Sandler technique of adding subthreshold modelling. In principle, its a little bit precarious. It has potential for convergence issues. Its correcting for a zero current discontinuity by adding a feedback loop.

It would be preferable to simply add a controlled current using a B source in parallel to the mosfet. One would then use an exp() function directly rather than using a diode. One could then wrap that with a tanh() to terminate its effect at larger currents.

A case in point, is... at my day job... we had an updated kit from X-Fab for the process that were using just this last couple of weeks. All my existing spice tests failed due to convergence issues. I traced it down to some modelling problems in the natural mosfets. They had newly introduced B Sources into the subckts, for reasons unknown. They were flagging up convergence issues all over the place. A bare mosfet worked ok, but once one put them into a real circuit, it fell apart.

So, if a mainstream fab can release a model kit that fails...

It might be worth mentioning in that section that LTSpice does model the non-linear gd capacitance and has a subthreshold extension as well. Being that millions of people use LTSpice, its getting to be a tad moot that Spice3 don't support certain features. Additionally, there are other spices that also do, with even other enhancements possible worth a mention... :-)

-- Kevin Aylward

formatting link
- SuperSpice
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Reply to
Kevin Aylward

On 7/26/19 2:32 PM, Winfield Hill wrote:

Here is a time domain of the fleshed-out idea oscillating OK in the sim. A few hundred cycles of the resonant frequency injected into the tank gets it moving, in the simulation.

There's a gyrator in series with the lossy-L to bring the "self-resonant frequency" down.

The desired result is that when the inductance of the lossy-L is changed (by compressing or stretching the physical coil) the frequency deviates a bit.

That's about it.

Anyway it looks good here but I'm concerned if it will be annoying to get operating reliably on a breadboard in particular the part-to-part tolerance on the JFET, any suggestions would be appreciated on that front

Version 4 SHEET 1 2432 1748 WIRE 432 -320 432 -432 WIRE 432 -320 224 -320 WIRE 640 -320 432 -320 WIRE 224 -256 224 -320 WIRE -304 -208 -304 -288 WIRE 176 -192 16 -192 WIRE 640 -160 640 -320 WIRE -304 -32 -304 -128 WIRE 224 0 224 -160 WIRE 1184 0 224 0 WIRE 1664 0 1248 0 WIRE 224 112 224 0 WIRE 640 160 640 -80 WIRE 640 160 288 160 WIRE 640 288 640 160 WIRE -176 416 -288 416 WIRE 16 416 16 -192 WIRE 16 416 -96 416 WIRE 224 416 224 208 WIRE 224 416 16 416 WIRE 640 416 640 368 WIRE 640 416 224 416 WIRE 960 416 640 416 WIRE 1200 416 960 416 WIRE 1408 416 1200 416 WIRE 1472 416 1408 416 WIRE 1408 464 1408 416 WIRE -288 528 -288 416 WIRE 640 560 640 416 WIRE 960 560 960 416 WIRE 1408 592 1408 528 WIRE 1664 592 1664 0 WIRE 1664 592 1408 592 WIRE 1408 656 1408 592 WIRE 1200 672 1200 416 WIRE -288 704 -288 608 WIRE 960 720 960 640 WIRE 960 720 880 720 WIRE 1136 720 960 720 WIRE 224 752 224 416 WIRE 640 752 640 640 WIRE 576 800 288 800 WIRE 1408 800 1408 720 WIRE 880 832 880 720 WIRE 960 960 960 720 WIRE 1024 960 960 960 WIRE 1200 960 1200 768 WIRE 1200 960 1104 960 WIRE 640 992 640 848 WIRE 224 1008 224 848 WIRE 1200 1024 1200 960 WIRE 224 1152 224 1088 WIRE 640 1152 640 1072 WIRE 880 1200 880 896 WIRE 1200 1200 1200 1104 WIRE 1200 1200 880 1200 WIRE 1200 1328 1200 1200 WIRE 1344 1328 1200 1328 WIRE 1488 1328 1344 1328 WIRE 1200 1392 1200 1328 WIRE 1344 1456 1344 1328 WIRE 1488 1456 1488 1328 WIRE 1200 1536 1200 1472 WIRE 1200 1648 1200 1616 WIRE 1344 1648 1344 1536 WIRE 1344 1648 1200 1648 WIRE 1488 1648 1488 1520 WIRE 1488 1648 1344 1648 WIRE 1200 1728 1200 1648 FLAG -304 -32 0 FLAG -304 -288 Vcc FLAG 432 -432 Vcc FLAG 224 1152 0 FLAG 640 1152 0 FLAG 1408 800 0 FLAG 1200 1728 0 FLAG -288 704 0 FLAG 1472 416 Out IOPIN 1472 416 Out SYMBOL pnp 288 208 R180 SYMATTR InstName Q1 SYMATTR Value BC557B SYMBOL res 624 -176 R0 SYMATTR InstName R1 SYMATTR Value 10k SYMBOL res 624 272 R0 SYMATTR InstName R2 SYMATTR Value 2.2k SYMBOL voltage -304 -224 R0 WINDOW 3 24 44 Left 2 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR Value 2.5 SYMATTR InstName V1 SYMBOL njf 176 -256 R0 SYMATTR InstName J1 SYMATTR Value J113 SYMBOL npn 288 752 M0 SYMATTR InstName Q3 SYMATTR Value BC546B SYMBOL res 208 992 R0 SYMATTR InstName R7 SYMATTR Value 50 SYMBOL npn 576 752 R0 WINDOW 3 66 66 Left 2 SYMATTR InstName Q4 SYMATTR Value BC546B SYMBOL cap 1392 464 R0 SYMATTR InstName C1 SYMATTR Value 470p SYMBOL cap 1392 656 R0 SYMATTR InstName C2 SYMATTR Value 470p SYMBOL cap 1248 -16 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 58 36 VTop 2 SYMATTR InstName C3 SYMATTR Value 47p SYMBOL res 624 976 R0 SYMATTR InstName R6 SYMATTR Value 10k SYMBOL npn 1136 672 R0 WINDOW 3 66 66 Left 2 SYMATTR InstName Q2 SYMATTR Value BC546B SYMBOL res 1184 1008 R0 SYMATTR InstName R3 SYMATTR Value 47 SYMBOL res 944 544 R0 SYMATTR InstName R4 SYMATTR Value 2.2k SYMBOL res 1120 944 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R5 SYMATTR Value 68k SYMBOL cap 864 832 R0 SYMATTR InstName C4 SYMATTR Value 470p SYMBOL ind 1184 1376 R0 SYMATTR InstName L1

SYMATTR SpiceLine Rser=0 Cpar=0 SYMBOL res 624 544 R0 SYMATTR InstName R8 SYMATTR Value 10k SYMBOL voltage -288 512 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value SINE(0 1 1Meg 0 0 0 1000) SYMBOL res -80 400 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R9 SYMATTR Value 10k SYMBOL res 1184 1520 R0 SYMATTR InstName R10 SYMATTR Value 50 SYMBOL res 1328 1440 R0 SYMATTR InstName R11 SYMATTR Value 100k SYMBOL cap 1472 1456 R0 SYMATTR InstName C5 SYMATTR Value 10p TEXT -352 48 Left 2 !.tran 100m TEXT 1592 1488 Left 5 ;Lossy L TEXT -632 296 Left 5 ;Kickstarter (sim only)

Reply to
bitrex

On 7/26/19 3:30 PM, bitrex wrote:

There was an error with that .asc here is the corrected version:

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SYMATTR SpiceLine Rser=0 Cpar=0 SYMBOL res 624 544 R0 SYMATTR InstName R8 SYMATTR Value 10k SYMBOL voltage -288 512 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value SINE(0 1 1Meg 0 0 0 1000) SYMBOL res -80 400 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R9 SYMATTR Value 10k SYMBOL res 1184 1520 R0 SYMATTR InstName R10 SYMATTR Value 50 SYMBOL res 1328 1440 R0 SYMATTR InstName R11 SYMATTR Value 100k SYMBOL cap 1472 1456 R0 SYMATTR InstName C5 SYMATTR Value 10p TEXT -352 48 Left 2 !.tran 100m TEXT 1592 1488 Left 5 ;Lossy L TEXT -632 296 Left 5 ;Kickstarter (sim only)

Reply to
bitrex

No, it's not going to work right. That bias network is wrong.

Reply to
bitrex

On 7/26/19 11:29 AM, Winfield Hill wrote:

Apologies for the message/.asc spam earlier, but here is a working revision:

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SYMATTR SpiceLine Rser=0 Cpar=0 SYMBOL res 624 512 R0 SYMATTR InstName R8 SYMATTR Value 10k SYMBOL voltage -400 512 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value SINE(0 1 1Meg 0 0 0 1000) SYMBOL res -192 400 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R9 SYMATTR Value 10k SYMBOL res 1184 1520 R0 SYMATTR InstName R10 SYMATTR Value 50 SYMBOL res 1328 1440 R0 SYMATTR InstName R11 SYMATTR Value 100k SYMBOL cap 1472 1456 R0 SYMATTR InstName C5 SYMATTR Value 10p SYMBOL npn 432 672 M0 SYMATTR InstName Q5 SYMATTR Value BC546B TEXT -464 48 Left 2 !.tran 10m TEXT 1592 1488 Left 5 ;Lossy L TEXT -744 296 Left 5 ;Kickstarter (sim only)

Reply to
bitrex

:) I get a mention in the great book - Yay!

piglet

Reply to
piglet

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