Hello everybody,
I needed the spice netlists for the library cells in the TSMC 90nm library. We had approached the cadence vendor for USF but they said they only provide front end files, i.e., .lef and .tlf(or .lib) files, but no back-end files while includes the .sp files. Does synopsys provide this as well on request?
I was wondering if somebody could help me out in obtaining this. The only other option for me is to use spice files for 180nm OSU library and scale it somehow...which will be tricky. Hand writing the spice files for the library will be too time consuming and I am trying to avoid that.
I would really appreciate any help on this.
Thanks, Koustav