Hi All,
Good morning. I am working on a project where I have to use some layouts designed in Tanner tools. I converterd the layouts to gds format and imported them back in cadence and so far so good! Everything imports fine.
The DRC errors I am getting when I run a DRC on the layouts imported confuses me a little. The first error was "Edge not on grid". I displayed grid lines on my design window and I can see them off grid.
Why so, I am not able to figure out. I tried to find information about it online...but nothing seems to help.
The second error was "active contact size, exactly: 0.60 x 0.60 um", SCMOS Rule 6.1.
I can see that both these DRC failures correspond to submicron design rules. The layouts in Tanner were originally in AMI ABN 1.5u and it was saved to AMI C5 0.5u gds file. Now, the DRC I am using has submicron rule design check.
Is there a way to fix these errors without having to redesign the complete layouts? Is there any setting or changes I have to incorportate?
Any help will be greatly appreciated.
Thanks a lot and Warmest Regards, Saran