I try to use some opb_bram to store data as SDRAM, so i add three opb_bram_if_ctrl core when i create the project, and then i set the all programm's sections into LMB_BRAM,the linker script is : /*******************************************************************/ /* */ /* This file is automatically generated by linker script generator.*/ /* */ /* Version: Xilinx EDK 6.3EDK_Gmm.10
*/ /* */ /* Copyright (c) 2004 Xilinx, Inc. All rights reserved. */ /* */ /* Description : MicroBlaze Linker Script */ /* */ /*******************************************************************/_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x400; _HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x400;
/* Define Memories in the system */
MEMORY { opb_bram_if_cntlr_3 : ORIGIN = 0x88000000, LENGTH = 0x0000FFFF opb_bram_if_cntlr_2 : ORIGIN = 0x88010000, LENGTH = 0x0000FFFF opb_bram_if_cntlr_1 : ORIGIN = 0x88020000, LENGTH = 0x0000FFFF SDRAM_8Mx32_2 : ORIGIN = 0x8A000000, LENGTH = 0x01FFFFFF SDRAM_8Mx32_1 : ORIGIN = 0x8C000000, LENGTH = 0x01FFFFFF ilmb_cntlr_dlmb_cntlr : ORIGIN = 0x00000000, LENGTH = 0x0000FFFF }
/* Specify the default entry point to the program */
ENTRY(_start)
/* Define the sections, and where they are mapped in memory */
SECTIONS { .text : { __text_start = .; *(.text) *(.text.*) *(.gnu.linkonce.t*) __text_end = .; } > ilmb_cntlr_dlmb_cntlr
.rodata : { __rodata_start = .; *(.rodata) *(.rodata.*) *(.gnu.linkonce.r*) __rodata_end = .; } > ilmb_cntlr_dlmb_cntlr
.sdata2 : { . = ALIGN(8); __sdata2_start = .; *(.sdata2) . = ALIGN(8); __sdata2_end = .; } > ilmb_cntlr_dlmb_cntlr
.sbss2 : { __sbss2_start = .; *(.sbss2) __sbss2_end = .; } > ilmb_cntlr_dlmb_cntlr
.data : { . = ALIGN(4); __data_start = .; *(.data) *(.data.*) *(.gnu.linkonce.d*) __data_end = .; } >ilmb_cntlr_dlmb_cntlr
.sdata : { . = ALIGN(8); __sdata_start = .; *(.sdata) __sdata_end = .; } > ilmb_cntlr_dlmb_cntlr
.sbss : { . = ALIGN(4); __sbss_start = .; *(.sbss) . = ALIGN(8); __sbss_end = .; } > ilmb_cntlr_dlmb_cntlr
.bss : { . = ALIGN(4); __bss_start = .; *(.bss) *(COMMON) . = ALIGN(4); __bss_end = .; } > ilmb_cntlr_dlmb_cntlr
PROVIDE (_SDA_BASE_ = __sdata_start + (__sbss_end - __sdata_start / 2 ));
PROVIDE (_SDA2_BASE_ = __sdata2_start + (__sbss2_end - __sdata2_start /
2 ));/* Generate Stack and Heap definitions */
bss_stack : { . = ALIGN(8); _heap = .; _heap_start = _heap; . += _HEAP_SIZE; . += _STACK_SIZE; . = ALIGN(8); _stack = .; __stack = _stack; } > ilmb_cntlr_dlmb_cntlr
}But my programm has not any response after i downloaded it into FPGA. Can you tell me the reason? How can i change it? Any advice is appreciated!!!!!!