Does anyone know if it is OK to have 3rd party devices in one JTAG chain with Xilinx FPGAs and CPLDs? The Xilinx devices I am using are XC2VP4 and XC9572XL...
Thanks, /Mikhail
Does anyone know if it is OK to have 3rd party devices in one JTAG chain with Xilinx FPGAs and CPLDs? The Xilinx devices I am using are XC2VP4 and XC9572XL...
Thanks, /Mikhail
-- To reply directly: matusov at square peg ca (join the domain name in one word and add a dot before "ca")
Symon,
Yes, that is what I was asking whether. Thanks. Can you tell what you were trying to achieve by combining these two beasts in one JTAG chain? I want to be able to use boundary scan equipment to verify connections between the chips in the board manufacturing phase. I am still not sure if it is worth the effort and money considering that I won't get 100% pin coverage... I would be curious to know how many people are actually using Intellitech and similar tools for testing their boards? Sorry if this is OT...
Thanks, /Mikhail
-- To reply directly: matusov at square peg ca (join the domain name in one word and add a dot before "ca") "Symon" wrote in message news:c6k0bo$clejr$1@ID-212844.news.uni-berlin.de... > Mikhail, > If you mean can you still program the FPGAs over the JTAG then yes, it's OK. > I've done it before with a Virtex II and an Intel StrongArm processor. IIRC > you need a boundary scan discription file for the 3rd party IC to keep > Impact happy. Sorry I can't be more specific, this work was at a previous > company. > Cheers, Syms.
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We use Corelis tools to verify ball-to-ball connectivity. Every board that we manufacture utilizes the JTAG chain to test as much of the board that is possible. Our chains involve Xilinx FPGA's and many other types of JTAG-able devices.
Bob
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