I have a board using XC2VP20-6FF896c and two xc18v04 proms, seems Jtag have problem as: 1) Whenever there is a free-runnimg clock, the Jtag config fails. when the free-runnimg clock is turned off, config successfully. 2) Maseter seral mode never work, check cclk, it is alway there.
Could clock interference affect Jtag configuration? but I use the same design with virtex E, there is no problem. Appreciate any help on this problem.