I have a piece of IP that acts as a slave on the PLB. I would like writes to this IP to be 64bits, while reads from it are OK at 32bits. The sample driver that was generated by the IP wizard gives functions for reads/writes or 32 bits as expected (by mapping them to XIo_In/Out32). Do I need to do writes in two transfers? If not, how do I write 64bits? I've looked over the PPC 405 Block Reference Guide and it seems that it should be possible to read/write 64 bits all at once just by virtue of having that wide of a bus coming in and out of the block. The cacheline transfers are discussed in that document as possibly being doublewords. I am a bit confused by all of this (if that wasn't clear already). I would probably be able to find my answer after a good deal of time/pain, but hopefully someone out there can clarify things a little for me. Just knowing if it was possible or not for a user program to do the 64bit write would help me move forward.
I'd appreciate any clarification and/or pointers to relevant documentation. I can provide more info about my design or my confusion if it is useful.
Thanks in advance, Joey