From experience, how common is it for the PLB DDR controller on the ML
310 board using a V2P30 to issue Rearbitrate (Retry) requests to the PLB master that initiated the memory transaction. I saw one such case in the following thread, but I wasn't sure if it was a bug the master logic code or just typical behavior from the DDR.
formatting link
At present, I am using the PLB BRAM, which in my experience, has never issued a retry. However, I intend on migrating to using the DDR in the near future.
Thanks in advance.
NN