IDE/ATA _device_ core availablility

"Holger Baxmann" wrote in news:c9pvir$4k6$ snipped-for-privacy@newsreader2.netcologne.de:

I've never seen the VHDL for a device-side IDE interface, but it shouldn't be too hard to do at least a PIO-mode interface. All you need to do is respond to reads and writes to two banks of eight registers each and generate the appropriate actions (maybe just read and write sector commands). I recommend looking at an early version of the ATA spec (before they got to several hundred pages) to see how the interface works. The one I've used is "ATA Interface Reference Manual" published by Seagate back in 1993 (stored at

Once you get a design roughed out, you could combine it in an FPGA or simulator with the IDE interface core we have at

That would show you if your device-side interface is alive before subjecting it to a real-world command stream from a PC IDE port.

---------------------------------------------------------------- Dr. Dave Van den Bout XESS Corp. PO Box 33091 Raleigh NC 27636 Phn: (919) 363-4695 Fax: (801) 749-6501 snipped-for-privacy@xess.com

Thank you, Dave

I will do my very best, but I need a harddisk either so the alternative is to be the real 'man-in-the-middle'.

Hopefully my board is arriving soon, there it could be on CD, does it?

bax PS: And thanks, Vobis ;-)