Hi all. I'm using a Virtex2 fpga which uses a lot of BRAMs. The design modifies the content of these BRAMs during elaboration. Is it possible to dynamically readback the BRAMs contents in a text file using JTAG? I've read the Xilinx documentation (impact) but I can't find a simple and fast solution. Can anybody help me? Thanks.
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yes. you can help yourself by implementing the readback yourself. its doable just read the documentation - the location of the bram bits can be obtained from .LL file
there is no tool yet available for this purpose. I have done some research with Spartan 3 readback, but nothing yet to be released maybe some day...
antti
You should be able to. You'll probably have to code your own application though. You can readback that data through a JTAG interface, or even internally, using OPB-HWICAP core. There is a tool called JBITS, but I'm not sure if it supports V2, and it is written in java. regards, alonzo.
Be aware that reading back the BRAM contents while the BRAM is active in the design can lead to corrupted contents. Do your readback before you start the clock.
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Hi, You can use the JTAG port of the FPGA to read back the contents of any BRAM. However you will need to build some custom logic into your design to enable this. Firstly you will need logic to talk to the JTAG port of the FPGA and secondly you will need logic to read the appropriate BRAM and pass the contents to the JTAG port. Furthermore you will need software on your PC to capture the data read back through the JTAG port.
The following Xcell article describes the GNAT design which illustrates how you can use the JTAG port of a Xilinx FPGA to communicate with the internals of your design.
The GNAT example design is available for download free from
Derek
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