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Current doubler: the Chinese paper

I have found a very interesting article on a variant of a current doubler, but not everything is clear to me:

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In the introduction they say (commenting the current doubler approach):

"Nevertheless, it still has several limitations, such as for high step-down voltage conversion, it requires a transformer with high turns ratio or it has to reduce the duty ratio of the switches. A high turns ratio will result in high duty loss and low conversion efficiency, while a low duty ratio will increase input peak current and component stress"

The latter is obvious, but the former is not: what do they mean by high duty loss? The best core utilization in a bridge is for D approaching

0.5, but they seem to imply that a conventional current doubler can't operate close to that limit. Why?

So:

"while the proposed rectifier can adjust the turns ratio of the coupled inductor to extend the duty ratio range, which can reduce the peak current through the isolation transformer and switches, and can lower output current ripple."

I understand that by the duty ratio range extension they just mean wider allowed range of duty ratios, not any dynamical effects of pulse compression/stretching. But then it would simply mean it can operate over a wider voltage range. Useful on its own, but in their reference design they employ a PFC providing 360..400V, so where's the point?

More questions concering the design come. They assume 100kHz and

500W, 12V output and the abovementioned PFC at the input. Reasonable. In the transformer design section, page 2686, they assume the maximum winding factor of 0.3. Why so low? I have always assumed 0.4.

They also take B_MAX=200mT, which implies an ETD44 and core losses=7.2W [0.4W/cm^3, 18cm^3] in the case of the PC40 material, which is about

3C90/3C94 in my parlance. Why are they trying to squeeze that much from this core? 200mT is nothing unusual on its own, but assuming just 100mT and their own equations the resulting transformer would be ETD49, which is not much bigger, but the losses would then be 0.05W/cm^3, 24cm^3, i.e. just 1.2W at the optimal thermal point around 100C, 2.4W at 25C. With 3C95 [readily available] the losses would be low even at 25C. This is exactly 6 times better and there is plenty of room for the windings, so one could use tape winding on the secondary [6 turns] and thick TIW on the primary [26 turns, assuming their duty range of 0.28..0.31]. Am I wrong here?

Best regards, Piotr

Reply to
Piotr Wyderski
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There's always the WC divider, as I'm now calling it:

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It's the inverse of the C-W multiplier, and, requiring so many inductors, it probably deserves a name like that. ;-)

For N=2 it reduces to the given case.

The inductors are independent, but I suppose you can use coupled inductors somehow. (It's not real clear at a glance what they're doing in the paper, or why it's not simply equivalent to using a lower ratio on the transformer.)

Note that, as a transformation, it requires a current-sourcing inverter, and delivers a CC output, just as the C-W requires a CV source and delivers a CV output (well, given limitations of losses, and the need for a far stiffer source than you might expect based on the ratio alone).

Tim

-- Seven Transistor Labs, LLC Electrical Engineering Consultation and Design Website:

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Reply to
Tim Williams

Cute. :-)

There is another paper of these Chinese and they explicitly compare the coupled and non-coupled variants.

The idea is to have the current doubler rectifier, but still allow the use of a 1.5-times lower V_BR diode/V_DS_MAX SR MOSFET. This thingy allows you to use a 60V part for 80V V_SEC input by temporarily boosting the current at the diode node and then bumping up the voltage back with the autotransformer action. A nice feature is that it requires no additional elements, just a tap.

But I don't understand why they limit their converter to D=0.31 at V_IN_MIN.

Best regards, Piotr

Reply to
Piotr Wyderski

From the bio of one of the authors, Yong-Dong Chang:

"His current research interests include design and implementation of resonant converters for battery chargers, and pulsed voltage generator application for liquid food sterilization."

Just wanted to note this is like, some serious next-level level nerdy shit. :) Mmm. Liquid food is my favorite.

Reply to
bitrex

Figure 3(a) is pretty unclear to me, I understand they're using duality to take the circuit from 3(a) to 3(b) but what all those lines represent isn't registering with my brain :)

Reply to
bitrex

He clearly belongs to the ward hosting gentlemen wearing the nice back-tied outfits, who draw their efficiency diagrams starting at

98% and then boast "my converter is 0.1% better than yours, Napoleon." Apart from that, very nice people. :-)

But seriously, this is a very popular topic nowadays. I know an agricultural scientist approaching it from the food side.

Best regards, Piotr

Reply to
Piotr Wyderski

Fast forward to the reference design section, who cares about dualities? ;-)

The PSU makes a lot of sense, but I spent half a day to re-discover the untold secrets related to inductor construction by careful tracking their calculations and comparing them to the ferrite material datasheet curves. Still not sure if they use foil winding in the chokes.

Best regards, Piotr

Reply to
Piotr Wyderski

Not usually, because instead of skin effect you have edge effect, and current crowding makes it worse at greater depth into the winding.

There are a few places that use a woven material, a flat Litz. West Coast Magnetics I know of. You can use something like that in layers.

Tim

--
Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Design 
Website: https://www.seventransistorlabs.com/
Reply to
Tim Williams

Piotr Wyderski wrote

I wondered if he really is so into the 0.8 % he won, why does he not use a synchronous rectifier with MOSFETs to get a few real percent?

His design philosophy makes no sense to me.

Reply to
<698839253X6D445TD

Here the application is a CC choke (or two of them), so you only need to care about deltaI_L, not I itself. IMHO low DCR is more important. Just a thought: parallel a diameter 2.5mm wire (area ~4.9mm^2) with a Litz of similar diameter (area ~2mm^2). Anybody with Ansys + the Maxwell equations solver module around? ;-)

Does not occur in this part of the world.

Best regards, Piotr

Reply to
Piotr Wyderski

Holy crap. All those components for 90% efficiency

An LLC converter with sync rectifiers are cheaper and witj a little work easily reaches 97%

This paper looks like all those novel papers in IEEE, with a fraction of them any good for practical implementation

Cheers

Klaus

Reply to
Klaus Kragelund

The number of components is typical for a PSFB, their only important contribution is the tapped choke. And the low efficiency figure comes mostly from the lack of SR. Their diode losses are 28W, so assuming

8W loss on a crude SR, the efficiency figure could be bumped back to the 95% range. The next factor is their suboptimal magnetic component design, they clearly suffer from the volumetric energy density mania.

Easily? In the high current range? At 42A every milliohm is 1.8W of losses.

And, unfortunately, I can confirm that. The simulation results from SPICE are much better in the case of a regular ZVS PSFB than with their tap. OTOH, this paper is very educative, as they design the converter step by step. Most IEEE papers, mostly those about integrated magnetics, don't care to explain their design decisions. "Here is my 99% efficiency

5kW converter, look how smart I am."

Best regards, Piotr

Reply to
Piotr Wyderski

At low voltage and high current, the leakage inductance terms begin to dominate in this topology, due to the current reversal requirement in the secondary windings. This eats up headroom and requires increasingly abnormal turns ratios, to achieve the same output voltage at full load.

RL

Reply to
legg

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