Want to learn about JTAG


I've been trying to find certain information about JTAG but have not been very successful.

For my own edification I'd like to learn how JTAG can be used to load a program into memory and executed. Then I'd like to be able to store a program into flash memory. I'm considering a Sharp LH7A400 based on the ARM922T core.

I'd like to use a PC running Linux as the host on which I will cross-compile my programs and download them onto the target via a JTAG interface. I have found some information on JTAG-tools and JTAG-ARM9. I can examine each of these programs to see what they do, but I won't know why they do it.

I'd like to learn the theory of operation of JTAG that would allow me to achieve the goal stated above. In particular I'm interested in: the communication protocol (commands, etc.), signals required and the timing of the signals, and cable specification (pinouts, connectors, shielded twisted pair or whatever), plus whatever else you feel is appropiate. Is anyone aware of a tutorial or other information I can access that might help me?

Has anyone added the definition of a new processor to JTAG-tools? If so, is it a matter of specifying the appropriate files, or is something more involved? Is the process documented, or could you describe what changes you made?

Is this an appropriate place to post this message? If not, can you suggest a better place.

Thanks, Randy Cooper

Reply to
Randy Cooper
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Just so you understand, JTAG is *extremely* device dependent -- that means chip dependent and, depending on implementation, board dependent. While it has signifcant power, it is also very difficult to use properly. Alos it is not intended for real-time work.

There is no communication "protocol". There are five wires for JTAG. One is a clock. The other 4 permit reading/writing a serial stream of bits. Each chip/device has a jtag bit "register" for *EVERY* input and output between the device and the outside world. You load and read the registers by pushing bits around a "loop" of these registers.

There is also a small "command" register that allows you to gate the data registers for normal signals or jtag bits. For inputs, the gating causes the outside world to be ignored and the device sees the bits as if they were from the outside world. For outputs, the gating blocks the device outputs and replaces them with the jtag bits.

The meaning of a serial sequence of bits depends on the particular device being used, and on the "jtag loop" among devices on the board (assuming there is more than one jtag device on the board).

I found several hits using google.

An "engineering" view of JTAG can be found at:

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The following has Linux/Wine JTAG interface software for the TI XDS510.

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The following site is a "free JTAG tool" for CPLD, a simple logic device. It includes source code.

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One drawback -- the main (only?) author is Japanese so the English is a bit stilted.

Regards, Steve

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It is deterministic, although not terribly fast.

??? Sounds like a protocol to me.

You missed mine, and a number of pages that it references:

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It approaches things from a Linux-centric perspective; the code given is on-topic for embedded Linux; it's how I initialize a Xilinx FPGA from a Linux StrongARM.

- Larry

Reply to
Larry Doolittle

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