Latest threads in Field-Programmable Gate Arrays

Why am I getting different results with two files collapsed into one?

5 5yrs

10956290

5 5yrs 10956290

Synthesizable open FPGA cores

Hi Experts, I am looking for Synthesizable FPGA (Xilinx) SOC cores like RUSC-V etc ( more than 100K LUTs) for evaluatin...

1 5yrs

gparthu

1 5yrs gparthu

To Reset or not to Reset, That is the Question!

Whether tis nobler to suffer the slings and arrows of outrageous judgement or just add the pointless, incorrectly worki...

4 5yrs

gnuarm.deletethisbit

4 5yrs gnuarm.deletethisbit

Using DSP Units

I working with the Gowin GW1N devices and need to do some serious math. By serious, I mean a number of calculations, no...

7 5yrs

gnuarm.deletethisbit

7 5yrs gnuarm.deletethisbit

Programming a Traffic Light Controller In verilog using Quartus Prime Lite

Hi everyone, ( Don't know if this is even the right place to post a question but ill tr y my luck) So basically I am a...

3 5yrs

theepicminingguys

3 5yrs theepicminingguys

Finally! I figgured it out accidentally.

Sometimes the tools are hard to figure out. I've been looking for a way to leave my source files in MY source directory...

2 5yrs

gnuarm.deletethisbit

2 5yrs gnuarm.deletethisbit

Is there a way in Verilog to refer to a slice of an array?

I've got two Verilog modules that look like this: module queue ( output [ 64:0] dataOut , input reset , input shift , i...

10 5yrs

kvnsmnsn

10 5yrs kvnsmnsn

ready/valid vs 2-way handshaking vs 4-way handshaking

I am confused about whether ready/valid handshaking is functionally equival ent to req/ack (2-way) handshaking? By bein...

4 5yrs

ubaidabdullah

4 5yrs ubaidabdullah

HP "owning" the software for Xilinx-FTDI drivers???

Someone new on the project is talking about how HP owns the driver code for the FTDI JTAG chip used to program Xilinx p...

6 5yrs

gnuarm.deletethisbit

6 5yrs gnuarm.deletethisbit

Active-HDL Throws Error

My code is assigning an incremented unsigned value to an aggregate so the s um and carry can be extracted without dupli...

14 5yrs

gnuarm.deletethisbit

14 5yrs gnuarm.deletethisbit

Gowin Synthesis Software

Just had my first taste of the company supplied software from Gowin Semicon ductor. It's ok. Documentation is terrible...

0 5yrs

gnuarm.deletethisbit

0 5yrs gnuarm.deletethisbit

XLNX on the Auction Block?

I'm reading reports that AMD is working on buying Xilinx and Qualcom and Broadcom may make bids as well. Stock is up fr...

0 5yrs

gnuarm.deletethisbit

0 5yrs gnuarm.deletethisbit

adding FPGA grounds

One of my guys is suggesting that we ground unused balls on an FPGA and compile them to be low outputs, the idea being...

20 5yrs

jlarkin

20 5yrs jlarkin

Real Time Simulation

I'm working on a project with a number of non-EE, non-CE types. A CE mocke d up a real time simulation of the UI which...

4 5yrs

gnuarm.deletethisbit

4 5yrs gnuarm.deletethisbit

What is wrong with low level code?

I recently posted a Verilog module to this forum, and someone responded tha t I was coding at a very low level, which w...

14 5yrs

kvnsmnsn

14 5yrs kvnsmnsn

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