Latest threads in Field-Programmable Gate Arrays

Problem with AXI4 Lite in Cyclone V

Hi, I have created a simple AXI4-Lite slave, which works perfectly in Xilinx Zynq FPGA. Unfortunately, the same design...

6 10yrs

wzab01

6 10yrs wzab01

Watchdog Timers for FPGA Designs

A recent thread in comp.arch.embedded concerns using watchdog timers. I made the point that they are used with software...

6 10yrs

gnuarm

6 10yrs gnuarm

Matlab-to-Gates for Xilinx

Does Xilinx still make a Matlab (not Simulink) -to-gates tool? I don't thi nk so, but I was just wondering. Not that I'...

3 10yrs

kevin.neilson

3 10yrs kevin.neilson

Help finding Xilinx software for HW-130 programmer

I am searching for some Xilinx programmer software for the HW-130 unit from around 1996-2000. Looking the the DOS versi...

7 10yrs

TimRegeant

7 10yrs TimRegeant

Deep Embedded Processor Board

The thread on spinning a 386 in an FPGA made me think about the FPGA boards available. I know you can find boards that...

5 10yrs

gnuarm

5 10yrs gnuarm

Online Writing Jobs / Jobs For Writers

We are a company looking for qualified individuals to help out with writing tasks such as: - short stories - movie scri...

0 10yrs

writingjobs205

0 10yrs writingjobs205

Simplistic AXI4-Lite to IPbus bridge

Hi, I found it useful to be able to control my IPbus ( https://svnweb.cern.ch/trac/cactus ) connected logic from an AXI...

0 10yrs

wzab01

0 10yrs wzab01

Challenges in data science which can be solved with FPGAs

Hi Everyone, I want to know what are the challenges in data science and cloud computing which are being faced today and...

3 10yrs

prasadp4009

3 10yrs prasadp4009

Do you understand what's at stake?

Do you understand what's at stake? If you do not let Jesus Christ take away your sins, then you will have to pay for th...

28 10yrs

rick.c.hodgin

28 10yrs rick.c.hodgin

VHDL Obfuscators, the Good, the Bad, and the Ugly

I have been looking at the various options for VHDL obfuscators. I have tried all of the free programs that I could fin...

2 10yrs

email.crj

2 10yrs email.crj

Atmels product selector

I've tried to open the product search in the CPLD product category several times in the last few days. I wanted to know...

3 10yrs

klammerj

3 10yrs klammerj

Using an FPGA to drive the 80386 CPU on a real motherboard

I have a desire to create an 80386 CPU in FPGA form, one which will plug in to the 132-pin socket of existing 80386 mot...

125 10yrs

rick.c.hodgin

125 10yrs rick.c.hodgin

Altera HSMC connector

Hello all. I'm looking for some information about Altera's FPGA. I have this Cyclone V GX dev board:...

18 10yrs

rick.c.hodgin

18 10yrs rick.c.hodgin

FPGA Internal or external USB PHY/SIE ??

We need to interface 8 to 16 embedded USB 2.0 devices to an FPGA. We could just use external ULPI transceivers but am w...

21 10yrs

sja

21 10yrs sja

Vivado MIG says "Design entry" is VERILOG, how to change to VHDL?

With Vivado 2015.4, I'm trying to add DDR3 memory to a Microblaze design. I add the Memory Interface Generator to the b...

1 10yrs

spacewar

1 10yrs spacewar

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