XST - undeterministic synthesis

Oct 03, 2004 4 Replies

Occasionally, I've discovered that the result of synthesis (default effort) depends on the instances order. I can bring a complete example but in short the illustration is following:


-- 24 LUTs architecture RTL is begin U1: entity .. U2: entity ..


-- 27 LUTs architecture RTL is begin U2: entity .. U1: entity ..



This fact complicates comparition of different design configurations. Is it normal? I've checked Synplify -- it always gives the same results irrespecively to the units order.


I've seen Synplify give different results after just changing the name of a net (and all references to it)!

Cheers, Jon

I guess that synthesis tools uses heuristics to find how to do the synthesis. They try to find the "best" solution but just can't try every possibilities. So the results depends on "how good" are theses heuristics. Since the input is different, the result can be different as well ...

Sylvain

It's not necessarily the synthesis tool that's giving different results, it's more likely map and par. The slightest change in the netlist or the constraints file causes map and par to give very different results. I've seen a 5% difference in the slice count if map and par find an easy solution or not.

most of the synthesizers re-synthesize the entire design whenever there is a change in the code (even a slightest one). therefore when you change your code the synthesizer can produce a different result. however a situation as you descired usually occurs when the code is not writen in a way that is easy for the synthesizer to understand (therefore a code revising may be needed), but this is not always the case sometimes the error can be caused by the synthesizer itself.

You also mentioned that in Synplify it works well (i.e. - no change due to the swap between the entity positions), that's also very resonable because each synthesizer / simulator synthesize the entire design by itself and acording to its own predifined algorithms.

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