this is my first real VHDL project, so it's perhaps more a beginner's question than a problem with Xst.
I have some components for my module two_pc, but when I translate it in ISE, both "translate" and "Place&Route" have warnings (system report says 308 warnings).
The problem: xst claims that some signals are connected but never used. For one component it even says there isn't any connection:
Xst:524 - All outputs of the instance of the block are unconnected in block .
I don't think that's true:
bild : bildspeicher port map (reset => reset, clk => clk_i, addra => bildaddr1, addrb => bildaddr2, DOA => bilddaten1, DOB => bilddaten2 );
(DOA and DOB are outputs) and there is a process using them:
chooser : process (clk_i, reset) --, update_input) variable links,rechts : std_logic_vector (31 downto 0); begin if (reset='1') then input '0'); elsif (clk_i'event and clk_i='1') then if (update_input'event and update_input='1') then rechts := bilddaten1; case spalte is when "00" => input (31)