Hi all, I'm using XST 14.2 and trying to use block RAMs to store constant data (i.e. as ROMs) for program code that will be run by a CPU. I want to infer the block RAMs during synthesis and then actually put data into them from an ELF during bitgen (in concert with a BMM file), so the data will be part of the bitstream and the FPGA will configure with the RAMs preloaded.
Here?s the problem: XST keeps noticing that the great big arrays have nothing in them, and declares that ?Signal is used but never assigned. This sourceless signal will be automatically connected to value GND.?. Then it turns it into a LUT RAM for some reason, but only a tiny one.
I?ve gone through the Spartan 6 XST user guide and the Xilinx constraint guide. I?ve tried attaching the KEEP attribute (set to ?yes?), the S attribute (set to ?yes?), and the EQUIVALENT_REGISTER_REMOVAL attribute (set to ?no?) to the PMem signal. I?ve tried attaching all three of them at the same time. I?ve even tried simultaneously attaching all those attributes to both the memory block, the address lines going into it, the clock line, and the data lines coming out of it. Nothing helps! XST insists that the RAM is useless and destroys it.
Surely this is a pretty common use case? What am I missing here?