Err, no?. What you do is keep the 4 read poert separate, and parallel each side's write ports - so you always write to TWO locations at once. You have consumed block ram, for the sake of simplicity and speed. You always write-before-using, both blocks have identical contents.
The only danger case is if the SW writes to (eg) R13 and R13, which could be trapped in HW, and/or in the assembler.
-jg
There's no upper limit per se; but essentially you are building something like a crossbar with internal storage; so the complexity increases approximately as the square of the number of ports.
It also slows down, to become the critical path above a certain point.
Then you can consider replicating parts of the register file to tackle this problem (IIRC, look at some of the later DEC Alpha CPUs for a case study) adding further complexity for relatively little benefit. But if you need that nanosecond, you'll pay for it...
- Brian
The problem comes when you need two fully independent write ports.
Remember that each BlockRam only gives you two independent ports; if you need one write port, that only leaves one read port. You can easily increase read ports by paralleling BlockRams, tying their Write ports in parallel. This forms a 1-Write,N-Read register file.
But two independent Write ports is more difficult; if both Write ports shared the same BlockRam, you would have no ports left over for Read!
What Andreas is suggesting (I think) is to divide your "register" space into two subspaces - even numbered registers, and odd regs. Each space uses the 1-W, N-R structure above.
This is very simple and it works; IF you can restrict the Writes to one even, one odd, in any clock cycle. Which is relatively easy if the double-writes are e.g. from a multiplier or a complex math unit or some such; you simply adopt a convention like Re=even, Im=odd, and your assembler or compiler back end enforces that restriction. You need no such restriction on read ports.
For this restriction you get a very simple and extremely large register file in BlockRam. This gives you options like switching entire register sets on an interrupt or process switch, by flicking an otherwise unused BlockRam address bit.
- Brian
Exactly, though I could certainly have made the point more clear in my original posting.
/Andreas
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