I've got a design using Select Map mode to program a Xilinx V2-Pro part. Many of the boards work, but one has stopped accepting the bit file download. Everything seems to proceed properly, but the DONE signal is never asserted. I can download via JTAG to the part just fine, but it just won't accept the Select Map download.
When my code asserts the PGM pin, DONE goes away and INIT is asserted. After a bit, I release PGM, then INIT goes away. All correct so far. I send down the data, but DONE is not asserted at the end.
All voltage levels look OK, timing looks fine, plenty of setup/hold time on the data going into the V2-Pro. This board used to work, but at some point decided to be a problem.
Also - if I load the FPGA via JTAG, I can run a set of diagnostics using the same 8 bit data bus and the diagnostics pass, ie, my data bus looks to be properly connected.
As far as I can tell, the FPGA appears to work perfectly EXCEPT it doesn't like to be downloaded via Select Map.
Has anyone else seen problems like this? Is it likely that the FPGA couls be damaged such that it can't accept download data but that the same data pins work fine after the part is programmed via JTAG?
The exact same .bit files work fine on other boards.
Suggestions?
Thanks!
John P