xilinx spi flash programming

I'm about to place an SPI flash for spartan 3e but I'm a bit disapointed in having to place another header to program it via impact.

It would seem that a fairly simple piece of code could configure the FPGA via the jtag header which would then program the flash with data it gets "chipscope style"

Does anyone know whether such a solution is in the pipeline?

Colin

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colin
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it is supported for S3A-V5 only ASFAIK

so I use my own tools for cross-platform SPI indirect programming

Antti

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Antti

What will you use the JTAG for? If it's only for testing/debugging your prototype, you can consider placing only a few solder pads for the JTAG connection. The little extra hassle is not a problem for debugging and production will only use the SPI connector.

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Stef    (remove caps, dashes and .invalid from e-mail address to reply by mail)
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Stef

the OP is right being disappointed! really he has.

i you have JTAG connector or testpads, but can not not use indirect jtag configuration for the SPI programming then its really PITA to add separate SPI header, just because impact doesnt handle indirect SPI for S3e then same way it handles it for S3A

Antti

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Antti

Oh yes, I was disappointed as well. And I didn't even know things are different with the S3A!

But I have to get on with my schematics and layout, so I decided to add some pads for the JTAG and a header for the SPI (hope I can find the space for it :-) ).

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Stef    (remove caps, dashes and .invalid from e-mail address to reply by mail)
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Stef

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The board has been designed for JTAG testing by a third party. They will use Scanworks (Asset intertech) for boundary scan and to program the flash and we can use the same header for JTAG development. You've worried me about using Impact for SPI programming as I assumed the S3e will be dormant, will read the datasheet again later.

Colin

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colin

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for SPI programming on S3E you need "JTAG_SPI_GATEWAY" from Xilant ;) or make your own...

the SPI programming on S3A is done by special bitstreams: .COR files as the protocol is secret so a 3rd party JTAG company can also not use xilinx solution for S3A (unless they use impact in background)

Antti

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Antti

In that case, just a few pads for the JTAG is not an option for you.

From what I understand, you will need to make sure the S3E puts it's SPI pins in high impedance mode. One way to do that is to pull the PROG_B input low (That's somewhere in te datasheet, search it for PROG_B).

But please do read the datasheet again. If you find that the above is incorrect, please notify me. I've almost finished my schematics and will start layout soon. On my board, I have connected PROG_B to one of the pins assigned to GND on the programming connector. That way, the programming cable will automaticaly pull PROG_B low when inserted.

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Stef    (remove caps, dashes and .invalid from e-mail address to reply by mail)
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Stef

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