xilinx unused I/O state

Hi,

What is the default state of the unused I/O pins for Xilinx FPGA (Spartan

3E)? For Altera FPGA, it can be set as input tri-stated or as output driving gnd, etc. Is there any counterpart operation in Xilinx ISE to set the unused I/O pins?

Thanks, JJ

Reply to
Steve
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Google this. unused I/O pins site:xilinx.com

HTH, Syms.

Reply to
Symon

And a little bit more helpfully, in the P&R tools under 'Generate Programming File' there an option called Unused IOB pins. You can set it to Pull Up, Pull Down or Float. HTH, Syms.

Reply to
Symon

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