I am experimenting with Xilinx CoreGen Counters. Right now at a very basic level. What I find is puzzling is first there seems to be no carry output - ripple or registered. Second, a free running counter has a logic one feeding the input carry. That's OK. But with the RPM option selected, this logic 1 does not move with the other L slices. Nor does its net autoroute. Is this a problem with the CoreGen?
- posted
19 years ago