Has anyone implemented the I2C controller core mentioned in the xapp333 in a FPGA.
I have simulated the core to set the address register. and it works in simulation. when i try to that there are problems during synthesis. i think its got something to do with dual INPUTOUTPUT ports. The synthesis tool keeps saying there are multisources and because of which i think something has gone wrong with the DTACK signal and there are problems.
I have pasted the part from synthesis report because of which i think the problems arise.
meanwhile if anyone else has implemented the I2C controller core and could give me tips it would be really helpful.
Thanks in advance vasu
WARNING:Xst:2040 - Unit i2c_tb: 8 multi-source signals are replaced by logic (pull-up yes): data_bus, data_bus, data_bus, data_bus, data_bus, data_bus, data_bus, data_bus. WARNING:Xst:2042 - Unit uC_interface: 9 internal tristates are replaced by logic (pull-up yes): data_bus, data_bus, data_bus, data_bus, data_bus, data_bus, data_bus, data_bus, irq. WARNING:Xst:2183 - Unit i2c_control: the following tristate(s) are NOT replaced by logic (Please refer to Answer Record 20048 for more information): scl, sda. WARNING:Xst:1906 - Unit uC_interface is merged (output ports from interface drive multi-sources)