I have a specific application where the FPGA needs to generate SPI bus like interface to a device but at different electrical voltage. SPI is a three wire serial bus interface I will be running at relatively slow speed of about 20MHz. The FPGA will drive out serial data out and serial clock out to the target device using lvcmos25 pudhpull driver and will be receiving serial data in.
The problem is that the traget device will have its vcc at 1.2V and and its Vee at -1.3V. As per my understanding FPGA can not drive out a waveform with 1.2v to
-1.3V swing. How to do the voltage translatin without affecting the signal integrity?
Any help will be greatly appreciated.