Xilinx CPLD XC95144 for Driving Sigma Delta DAC

nba83 · 2012-09-23T05:57:27+00:00

hii would like to drive a Digital to analog converter(AD1933) with a cpld,here is what i'm trying to do: i have a micro controller that generate25Mbps DAC data but is not capable of driving the DAC through high speedSPI(i need over 35MHz spi interface), so i decided to drive the dac withcpld or fpga,since i don't want to increase project cost by using fpga so i prefer touse cpld XC95XX(XC95144) for this application, i'm not sure if this cpld iscapable of driving the dac at this rate, any one have any idea about thefeasibility of this plan??tnx in advance for help --------------------------------------- Posted through

Sep 23, 2012 24 Replies

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Nico Coesel 13 years ago

I guess ST is still making mediocre controllers. After an adventure with the STR700 series I switched to NXP and never looked back at ST. Appearantly a good choice :-)

Failure does not prove something is impossible, failure simply indicates you are not using the right tools... nico@nctdevpuntnl (punt=.) --------------------------------------------------------------

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Tim Wescott 13 years ago

35MHz clock at the peripheral -- the ST chip he's looking at is rated for 70 or 72MHz or some such.

My liberal friends think I'm a conservative kook. My conservative friends think I'm a liberal kook. Why am I not happy that they have found common ground? Tim Wescott, Communications, Control, Circuits & Software http://www.wescottdesign.com

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Nico Coesel 13 years ago

AFAIK most ST devices can't run from flash at their rated clock speeds. NXP's can and some go up to 120MHz (180MHz is on its way)!

Failure does not prove something is impossible, failure simply indicates you are not using the right tools... nico@nctdevpuntnl (punt=.) --------------------------------------------------------------

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langwadt 13 years ago

STM32F4 has a flash accelerator similar to NXP and run at full speed

168MHz

the stm32f107 looks to have 2x I2S that can run at pclk/2 the ad1933 can run dual line so I think it should be possible

-Lasse

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Tim Wescott 13 years ago

Yes, good point. And part of my point to the OP is that once he solves his ADC throughput problem, is he going to be able to generate the data?

Depending on his application, a teeny bit of code running out of RAM in the '107 may be enough. Or, the app may self-destruct on a ton of code running at 120MHz on your NXP.

Tim Wescott Control system and signal processing consulting www.wescottdesign.com

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