I want to use an Altera CPLD to do the interface between an ISA-Bus and a Cyclone II-FPGA. The CPLD should satisfy the criteria of the ISA-Bus timing to enable/disable the FPGA and do the level-conversion between the 5V ISA-Bus-levels and the logic levels of the FPGA (3,3V or 2,5V or 1,8V).
I found this Altera CPLDs: MAX II doesn't support 5V I/Os MAX 3000A MAX 7000B doesn't support 5V I/Os MAX 7000AE MAX 7000S What is the main difference between this 3 remaining CPLDs? Is one of them a mature device? Which Altera CPLD should I use, I'm unfortunately not so familiar with CPLDs.
Thanks for help, Manfred