xilinx aurora lane order

I have had similar issues with different interfaces that used multiple transceiver channels bonded. In my case, I could specify any order I wanted just by changing the pin numbers for the various transceivers in the constraints file. I understand that the internal connections between the transceivers and the core go via regular FPGA fabric, and as such you should be able to swap the transceivers around (unless operating at high clock rates, which might make it difficult to route to speed if you choose some wildly sub- optimal ordering).

It ought to be pretty quick to test that in whatever tool you're using - just change the pinout and see if it builds.

I guess you also have DC blocking caps on the transceiver signals. This implies that you'll have vias on the traces (to get them to an outer layer), which makes it pretty easy to swap the pairs around on the PCB if you can't get the FPGA tools to cooperate.

Allan

Allan

We tried a build by just changing the pinout and it fails. The Aurora wizar d has a setting where you tell it the first MGT you want to use and then it uses the consecutive MGTs as required. It "helps" by then locking down whe re some of the logic is placed within the FPGA and so meeting timing become s impossible if you change MGT locations.

I had hoped our firmware guy had given up on finding a different Aurora wiz ard setting because he is busy and it is not a problem he needs to solve.

cheers,

Colin

I suggest asking your question again in this forum:

BTW, An earlier thread in that forum may have the answers you want:

Regards, Allan