I am working on inmplementation of order statistics CFAR, where sorting of a continuous stream of data is required.
Exactly problem is as under: I am getting a continuous stream of 16-bit data. In every clock cyle I have to sort 32-size array. When I have sorted the array in ascending order, I want to choose 24th number only. In the next clock cycle, I get a new no added to my array while the first number gets out of the array. The new array that I get is to be sorted again and he 24th position number is to be taken out. So, in every clock cycle, I get a new data (in an array of 32 16-bit numbers) (with the oldest data getting deleted from this array) and in the same clock cycle, I need to have the 24th-position data available to me for further processing.
Can anybody help me in this? Plus if someone can direct me to any useful link on VHDL designs of sorting, since I am new to FPGA and VHDL.
Thanx in advance.