Using the Xilinx JTAG Interface as a General-Purpose Communication Port

"bob allen" schrieb im Newsbeitrag news:d2elp8$urq$ snipped-for-privacy@reader01.news.esat.net...

General-Purpose Communication Port see

YES, the GNAT is nice thing too, but my very small idea was using some JTAG pins as 'plain vanilla' inputs for the FPGA, so you can add a push-button to TCK pin and check the push button from FPGA. You are referencing to an IP core that is controlled by host PC to provide virtual IO similar to Virtual IO in the ChipScope thats different thing, much more interesting but just different thing

Antti