using FPGA JTAG as GPIO

Hi I want to debug a custom board with no interface for data exchange. The requirement is PC based autometic test pattern generation and real time data exchange from FPGA based hardware.

I chanced to see an article in Xcell Journal of 2nd quarter 2005, titled: "Using the JTAG Interface as a General-Purpose Communication Port"--- but couldn't find any thing from the link given in the article.

How can I get GNAT tool as described in that article.

Or

Any other suggestion to use JTAG of Xilinx FPGA as general purpose I/ O.

regards MH

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mh
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just connect your logic to BSCAN and implement anything you need.

BSCAN "redirects" USERx JTAG instructions for custom implementation in the FPGA fabric. just look in IP cores that use this, like the OPB_MDM, etc..

Antti

Reply to
Antti

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