Using LVDS_25 with 3.3V Vcco.

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-------------------------------------------------- Given a target line impedance, you need to find what drive resistors will:

1) match that impedance 2) give compliant voltage levels

In both examples below, the output voltages comply with the LVDS specification and the transmitter presents 100 ohm to the line (neglecting any impedance of the device output).

-------------------------------------------------- For differential drive between 0V and 2.5V:

+V -----170ohm-----:--------->

| | 240ohm | | -V -----170ohm-----:--------->

-------------------------------------------------- For differential drive between 0V and 3.3V:

+V -----150ohm-----:--------->

| | 150ohm | | -V -----150ohm-----:--------->

-------------------------------------------------- Clearly, there is more power dissipated in the second design (both in the resistors and in the differential drive circuits), but it avoids a separate 2.5V supply.

As far as damaging the hardware is concerned...

In my first experiment with LVDS (a Cyclone II driving an LCD via four LVDS pairs at 350Mbit/s), I decided it was rather tedious to fit the twelve matching resistors, so I just connected the FPGA outputs to the line. It ran continuously for several months before I did it "right" and I saw no evidence of damage (or errors). But to mention such "design" at polite dinner parties may lead to embarrassed silences and shuffling of feet, so it's better to do it right.

Mike

So it's a must to have a resistor setup at the fpga lvds output driver ..? (Or maybe it only applies to Altera and not Xilinx?)

I have no experience of Xilinx products, but I understand that there is some provision for internal matching resistors. If you want to use those and they present the desired impedance to the load then you need to check that, with a 3.3V supply, the output voltages are within your specification.

It seems likely that any internal matching resistors can be disabled in configuration, so that you can use a different I/O supply or drive lines with a different impedance. You need to read the Xilinx specification in detail.

Mike

We tested a Spartan3 lvds input, at 3.3 volts Vccio. It appears to be a pretty good rail-to-rail comparator.

John

posedge,

I am presuming that you are referring to a Spartan 3E/3A/3AN/3D series part. If not, then please let me know if it is a Xilinx part, and which one.

First, LVDS is a standard, and does not have a specified Vcc. By that, I mean the output voltages, and input ranges are all detailed in the IEEE/ANSI standards, and the designer can choose how to power it.

We chose (in the referenced parts above) to power it from 2.5V. If instead, you power the bank from 3.3V, no harm is done, both the driver and the receiver will function (operate), but the specifications of LVDS (drive impedances, input termination impedances, p-p voltage swing, common mode voltage) may not be within the LVDS standard's specifications.

That said, if you characterize it over voltage, and temperature, and feel you have sufficient margins, and accept responsibility for using it this way, then, be our guest. Of course, if it doesn't meet one or more of your requirements, don't expect Xilinx to do anything for you, as your use is outside of the recommended data sheet parameters.

Austin

A little elaboration on what's been stated, perhaps, to tie it all up.

The mention of resistors is valid when using full rail-to-rail outputs such as LVCMOS_33 to drive the two single-ended outputs. This is the technique used for devices that don't have native LVDS or for BusLVDS signals. Even though the resistors look like they could cut the signal level for the *receive* side as well in a transceiver, all it does is slow down the signal a little with the series resistor into the parasitic capacitance. The resistor network is not valid for native LVDS outputs as the transmit level will be severely reduced; it may work, but with less noise immunity.

I expect the Xilinx software will complain about putting LVDS standards on a 3.3V bank such that you have to specify 2.5V in the software to get MAP and PAR to complete then wire it up to 3.3V later. As far as what this will do to the other I/Os you had at 3.3V is not obvious if you have to specify LVCMOS_25 at 12 mA versus LVCMOS_33 and some other drive current.

The transmit and receive impedances will be different at 3.3V than what you'd expect at 2.5V and I don't believe the IBIS models will help you out here. It's been underscored that the LVDS inputs can be in any VCCO-powered bank in some of these newer parts but the internal receive terminations will NOT be in the 100-120 ohm range expected for the 2.5V VCCO but much lower impedance at 3.3V. I haven't even thought about looking at the transmit impedance at 3.3V since the other problems keep me powering my LVDS with 2.5V.

It might be safest from a software and integrity standpoint to use the resistor terminations and use LVCMOS_33 to drive the lines if you're not going over 400 Mb/s. For a receiver, you can use a lone external 100 ohm differential resistor (as opposed to those darned hard-to-solder single-ended resistors) instead of the three resistor network. If you have a transceiver, things might get weird: if you use LVCMOS transmitters, you can't use a differential receiver; if you use the full-swing BLVDS signal to get the differential receiver, you may have the same problem specifying a 3.3V VCCO for your bank from the software perspective. If you need transceivers, get back to us; we might be able to find a solution anyway.

- John_H

It's for a Spartan-3E starter kit (thus XC3S500E-FG320-4C) which I want to use for driving a lvds receiver (like THC63LVDF84A found in tft modules). The problem is that the Hirose FX2 connector which have a jumper for

3.3V or 2.5V Vcco is expensive when you just want the connector. So I'm looking for using other available ports (J1, J2, J4). But they are likely 3.3V only. So my idea was that maybe at least for testing, 3.3V Vcco operation is tolerable for the lvds receiver specification. The only alternative seems to put a 5x RS422 400 Mbps transmitter chip on seperate prototype pcb.

We usually use 3.3 volts on Spartan3 lvds inputs and outputs, and it has always worked so far.

External termination of inputs might be prudent, as someone has mentioned that the termination impedance might not be right at 3.3.

John

Consider soldering directly to the pins on the expansion connector. The Hirose connector isn't that expensive (I believe they're available from both DigiKey and Mouser) but before I had them on hand, I wired an RJ45 connector straight to the pins on the board-side of the connector. The nice thing about differential signals is that they're pretty tolerant to this kind of manipulation.

I would *seriously* consider avoiding the general purpose connections because they are *not* treated as differential signals on the board. Finding complementary pairs on those connectors might also be difficult. Keep in mind that the signals that go to the Hirose connector also go to the "no touch connector" pads where you could pick of some signals for soldering; there would be a stub if you don't do anything but you could always take an Xacto knife to the trace beyond that point.

Go for the 2.5V!

- John_H